JPH0342568U - - Google Patents

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Publication number
JPH0342568U
JPH0342568U JP10248489U JP10248489U JPH0342568U JP H0342568 U JPH0342568 U JP H0342568U JP 10248489 U JP10248489 U JP 10248489U JP 10248489 U JP10248489 U JP 10248489U JP H0342568 U JPH0342568 U JP H0342568U
Authority
JP
Japan
Prior art keywords
waveform
data
input data
glitch
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10248489U
Other languages
Japanese (ja)
Other versions
JPH0740219Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989102484U priority Critical patent/JPH0740219Y2/en
Publication of JPH0342568U publication Critical patent/JPH0342568U/ja
Application granted granted Critical
Publication of JPH0740219Y2 publication Critical patent/JPH0740219Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案に係る任意波形発生器の一実施
例を示す構成図、第２図はグリツチについて説明
するための図、第３図は従来の任意波形発生器の
一例を示す図である。 １……波形メモリ、２……クロツク・アドレス
発生器、３……ＤＡ変換器、５……ローパスフイ
ルタ、１０……演算・制御回路、１１……グリツ
チデータメモリ。 FIG. 1 is a block diagram showing an embodiment of an arbitrary waveform generator according to the present invention, FIG. 2 is a diagram for explaining glitches, and FIG. 3 is a diagram showing an example of a conventional arbitrary waveform generator. . 1... Waveform memory, 2... Clock/address generator, 3... DA converter, 5... Low pass filter, 10... Arithmetic/control circuit, 11... Glitch data memory.

Claims (1)

【実用新案登録請求の範囲】 演算・制御回路により波形定義式を演算し、演
算結果をＤＡ入力データとして波形メモリに記憶
しておき、この波形メモリから順次波形データを
読み出してＤＡ変換器によりアナログ変換し、更
にこれをローパスフイルタを通して出力すること
により、任意波形を発生するように構成された任
意波形発生器において、 前記ＤＡ変換器が、あるＤＡ入力データ変換か
ら他のＤＡ入力データ変換に切り変る際に発生す
るグリツチの、ある一定期間内に測定した上下非
対称分の値を記憶したグリツチデータメモリを備
え、 前記演算・制御回路は、関数定義式より波形デ
ータを求めてこれをＤＡ入力データに変換する際
に、グリツチデータメモリの値を参照し出力波形
に影響を与えるグリツチが発生した場合は次のＤ
Ａ入力データに対して前記グリツチの上下非対称
分を打ち消すように補正する機能を含むように構
成されたことを特徴とする任意波形発生器。[Claims for Utility Model Registration] The waveform definition formula is calculated by the calculation/control circuit, the calculation result is stored in the waveform memory as DA input data, and the waveform data is sequentially read from the waveform memory and converted into analog data by the DA converter. In the arbitrary waveform generator configured to generate an arbitrary waveform by converting the data and outputting the same through a low-pass filter, the DA converter switches from one DA input data conversion to another DA input data conversion. The arithmetic and control circuit obtains waveform data from the function definition formula and inputs it to the DA. When converting to data, refer to the value in the glitch data memory and if a glitch occurs that affects the output waveform, use the following D
An arbitrary waveform generator characterized in that it is configured to include a function of correcting input data so as to cancel the vertical asymmetry of the glitch.
JP1989102484U 1989-08-31 1989-08-31 Arbitrary waveform generator Expired - Lifetime JPH0740219Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989102484U JPH0740219Y2 (en) 1989-08-31 1989-08-31 Arbitrary waveform generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989102484U JPH0740219Y2 (en) 1989-08-31 1989-08-31 Arbitrary waveform generator

Publications (2)

Publication Number Publication Date
JPH0342568U true JPH0342568U (en) 1991-04-22
JPH0740219Y2 JPH0740219Y2 (en) 1995-09-13

Family

ID=31651379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989102484U Expired - Lifetime JPH0740219Y2 (en) 1989-08-31 1989-08-31 Arbitrary waveform generator

Country Status (1)

Country Link
JP (1) JPH0740219Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109239423A (en) * 2018-10-15 2019-01-18 北京数采精仪科技有限公司 A kind of random waveform current signal source based on FPGA

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167522A (en) * 1986-12-29 1988-07-11 Nec Home Electronics Ltd Digital/analog converter
JPS643223U (en) * 1987-06-19 1989-01-10

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167522A (en) * 1986-12-29 1988-07-11 Nec Home Electronics Ltd Digital/analog converter
JPS643223U (en) * 1987-06-19 1989-01-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109239423A (en) * 2018-10-15 2019-01-18 北京数采精仪科技有限公司 A kind of random waveform current signal source based on FPGA
CN109239423B (en) * 2018-10-15 2024-05-03 北京数采精仪科技有限公司 Arbitrary waveform current signal source based on FPGA

Also Published As

Publication number Publication date
JPH0740219Y2 (en) 1995-09-13

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