JPH0342123U - - Google Patents

Info

Publication number
JPH0342123U
JPH0342123U JP10174389U JP10174389U JPH0342123U JP H0342123 U JPH0342123 U JP H0342123U JP 10174389 U JP10174389 U JP 10174389U JP 10174389 U JP10174389 U JP 10174389U JP H0342123 U JPH0342123 U JP H0342123U
Authority
JP
Japan
Prior art keywords
semiconductor layer
insulating film
interface level
gate
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10174389U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10174389U priority Critical patent/JPH0342123U/ja
Publication of JPH0342123U publication Critical patent/JPH0342123U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
JP10174389U 1989-09-01 1989-09-01 Pending JPH0342123U (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10174389U JPH0342123U (en:Method) 1989-09-01 1989-09-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10174389U JPH0342123U (en:Method) 1989-09-01 1989-09-01

Publications (1)

Publication Number Publication Date
JPH0342123U true JPH0342123U (en:Method) 1991-04-22

Family

ID=31650676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10174389U Pending JPH0342123U (en:Method) 1989-09-01 1989-09-01

Country Status (1)

Country Link
JP (1) JPH0342123U (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012077527A1 (ja) * 2010-12-10 2012-06-14 シャープ株式会社 半導体装置および半導体装置の製造方法、ならびに液晶表示装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012077527A1 (ja) * 2010-12-10 2012-06-14 シャープ株式会社 半導体装置および半導体装置の製造方法、ならびに液晶表示装置
JP5336005B2 (ja) * 2010-12-10 2013-11-06 シャープ株式会社 半導体装置および半導体装置の製造方法、ならびに液晶表示装置
US9030619B2 (en) 2010-12-10 2015-05-12 Sharp Kabushiki Kaisha Semiconductor device, method for manufacturing semiconductor device, and liquid crystal display device

Similar Documents

Publication Publication Date Title
JPH03101556U (en:Method)
JPH0342123U (en:Method)
JPH0390439U (en:Method)
JPH0342124U (en:Method)
JPH028055U (en:Method)
JPH02118954U (en:Method)
JPH03101557U (en:Method)
JPH01104051U (en:Method)
JPH0262419U (en:Method)
JPH03101518U (en:Method)
JPH0436255U (en:Method)
JPH02137054U (en:Method)
JPS6142860U (ja) 相補型ｍｏｓ半導体装置
JPS5918447U (ja) アモルフアスシリコン電界効果型トランジスタ
JPH0176067U (en:Method)
JPS6018558U (ja) 薄膜トランジスタ素子
JPS60141158U (ja) シヨツトキ−障壁型電界効果トランジスタ
JPS6221558U (en:Method)
JPS6134754U (ja) 電界効果トランジスタ
JPS60153548U (ja) ラテラル型トランジスタ
JPH02136340U (en:Method)
JPS63118249U (en:Method)
JPS6142863U (ja) Ｍｏｓ半導体装置
JPS60125748U (ja) ラテラル型トランジスタ
JPS63128726U (en:Method)