JPH0336594A - Display control circuit - Google Patents

Abstract

PURPOSE:To enable fast drawing on a graphic memory by providing a destination register, a sort register, and a selecting circuit which selects write data outputted by plural data generating circuits. CONSTITUTION:Data is stored in the destination register 3 together with the read timing of the graphic memory 1. The data generating circuits 5a and 5b generate data by using the inputted data as generation conditions and send their outputs to the selecting circuit 6. At this time, write timing to the graphic memory 1 is generated and then the value of the 2nd bit of a select pattern register 7 specified by a pattern pointer register 8 is outputted as a signal C to the selecting circuit 6. Then the selecting circuit 6 selects the data generated by the data generating circuits 5a and 5b according to the output of the select pattern register 7. This output data D is written in a destination data storage part 2 on the graphic memory 1. Consequently, the fast drawing on the graphic memory is enabled.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a display control circuit, and particularly to control of data written to a graphic memory.

[Conventional technology]

Conventionally, this type of drawing to graphics memory was performed by the CPU.
First, the drawing data and destination data on the graphics memory are referred to, and then write data is generated from the above two data, and then written to the destination on the graphics memory.

[Problem to be solved by the invention]

In the conventional drawing described above, even when a repetitive pattern is generated, the drawing data (repetitive pattern) is always read from the main memory, the destination data is read from the graphic memory, the CPU generates the drawing data, and the graphic memory Since it is necessary to perform four steps for writing to the , there is a drawback that the processing takes time.

[Means for Solving the Problems] In order to eliminate such drawbacks, the present invention provides a rewritable destination register that stores arbitrary destination data on a graphic memory, and a rewritable destination register that stores drawing data. possible source registers, a data generation circuit that generates write data from data set in the destination register and data set in the source register, and a selection circuit that selects write data output from multiple data generation circuits. A rewritable selection pattern register that stores a selection pattern, and a rewritable pattern pointer register that indicates the position of the selection pattern are provided.

[Effect]

In the display control circuit according to the present invention, the two processes of reading a pattern from the main memory and generating drawing data by the cPU are omitted.

〔Example〕

The figure is a system diagram showing one embodiment of a display control circuit according to the present invention. In the figure, l is a graphic memory, 2 is a destination data storage unit, 3 is a destination register, 4 is a source register, 5a,
5b is a data generation circuit, 6 is a selection circuit, 7 is a selection pattern register, and 8 is a pattern pointer register.

Next, the operation will be explained. An arbitrary destination data storage part 2 (value is at logic level "1") on the graphic memory 1 is stored in the destination register 3 together with the read timing of the graphic memory 1.

Next, the data in the source register 4 (value is at logic level "0") and the data in the destination register 3 are input to data generation circuits 5a and 5b. The data generation circuits 5a and 5b generate manually generated data according to generation conditions (AND and N0P in the circuit 5a and the circuit 5b in this embodiment), and output it to the selection circuit 6.

At this time, as a write timing to the graphic memory l occurs, the selected pattern register 7 (value is 010110x) pointed to by the pattern pointer register 8
”) is outputted to the selection circuit 6 as a signal C.

The selection circuit 6 selects the data generated by the data generation circuits 5a and 5b according to the output of the selection pattern register 7. In this embodiment, the output A of the AND circuit 5a (the value is “0°
) and the output B (the value is “l”) of the NOP circuit 5b, and the output C (the value is “l”) of the selection pattern register 7, the AN
The output A (value is "0") of the D circuit 5a is selected and outputted from the selection circuit 6 as a signal. This output data D is written to the destination data storage section 2 on the graphic memory l.

〔Effect of the invention〕

As explained above, the present invention includes a rewritable destination register that stores arbitrary destination data on a graphic memory, a rewritable source register that stores drawing data, and a rewritable source register that stores arbitrary destination data on a graphic memory. a data generation circuit that generates write data from data set in a source register; a selection circuit that selects write data output from a plurality of data generation circuits; and a rewritable selection pattern register that stores a selection pattern; By providing a rewritable pattern pointer register that indicates the position of the selected pattern, it is possible to omit the two processes of reading the pattern from the main memory and generating drawing data by the CPU when generating a repetitive pattern. This has the effect of allowing drawing to be performed.

[Brief explanation of drawings]

The figure is a system diagram showing one embodiment of a display control circuit according to the present invention. l... Graphic memory, 2... Destination data storage section, 3... Destination register, 4... Source register, 5a, 5b... Data generation circuit, 6... Selection circuit, 7 ... Selection pattern register, 8... Pattern pointer register.

Claims (1)

[Claims] A rewritable destination register that stores arbitrary destination data on the graphic memory, a rewritable source register that stores drawing data, and the data set in the destination register and the data set in the source register. a data generation circuit that generates write data from a plurality of data generation circuits; a selection circuit that selects write data output from a plurality of data generation circuits;
A display control circuit comprising a rewritable selection pattern register that stores a selection pattern and a rewritable pattern pointer register that indicates the position of the selection pattern.