JPH0333U - - Google Patents
Info
- Publication number
- JPH0333U JPH0333U JP5795489U JP5795489U JPH0333U JP H0333 U JPH0333 U JP H0333U JP 5795489 U JP5795489 U JP 5795489U JP 5795489 U JP5795489 U JP 5795489U JP H0333 U JPH0333 U JP H0333U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- chamber
- electrodes
- semiconductor
- concentrically
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 238000005530 etching Methods 0.000 description 2
Landscapes
- Drying Of Semiconductors (AREA)
Description
第１図はエツチングに使用される本考案装置の
実施例を示す縦断面図、第２図は上部電極および
下部電極に対する給電点を示す説明図である。第
３図はエツチングに使用される半導体製造装置の
第１の従来例を示す縦断面図、第４図は第２の従
来例を示す縦断面図である。
１３…半導体ウエーハ、３３…チヤンバー、４
３…処理室、４４…上部電極、４５…下部電極。
FIG. 1 is a longitudinal sectional view showing an embodiment of the apparatus of the present invention used for etching, and FIG. 2 is an explanatory view showing power supply points for the upper electrode and the lower electrode. FIG. 3 is a vertical sectional view showing a first conventional example of a semiconductor manufacturing apparatus used for etching, and FIG. 4 is a vertical sectional view showing a second conventional example. 13...Semiconductor wafer, 33...Chamber, 4
3...Processing chamber, 44...Upper electrode, 45...Lower electrode.
Claims (1)
ハを気密的に囲繞するチヤンバーの上下外側位置
に、内径が半導体ウエーハの外径より大径な環状
の上部電極と下部電極とをチヤンバーにそわせて
、かつ、半導体ウエーハと同芯状に平行させて対
設したことを特徴とする半導体製造装置。 Annular upper electrodes and lower electrodes, each having an inner diameter larger than the outer diameter of the semiconductor wafer, are arranged along the upper and lower outer sides of a chamber that airtightly surrounds a semiconductor wafer placed in a horizontal position in a processing chamber, A semiconductor manufacturing device characterized in that it is installed parallel to and concentrically with a semiconductor wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5795489U JPH0333U (en) | 1989-05-18 | 1989-05-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5795489U JPH0333U (en) | 1989-05-18 | 1989-05-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0333U true JPH0333U (en) | 1991-01-07 |
Family
ID=31583132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5795489U Pending JPH0333U (en) | 1989-05-18 | 1989-05-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0333U (en) |
-
1989
- 1989-05-18 JP JP5795489U patent/JPH0333U/ja active Pending