JPH0332230B2 - - Google Patents
Info
- Publication number
- JPH0332230B2 JPH0332230B2 JP8094382A JP8094382A JPH0332230B2 JP H0332230 B2 JPH0332230 B2 JP H0332230B2 JP 8094382 A JP8094382 A JP 8094382A JP 8094382 A JP8094382 A JP 8094382A JP H0332230 B2 JPH0332230 B2 JP H0332230B2
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- forming
- silicon layer
- fuse element
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 28
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 230000001681 protective effect Effects 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 description 24
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 24
- 238000009792 diffusion process Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000011109 contamination Methods 0.000 description 3
- 238000001947 vapour-phase growth Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57080943A JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57080943A JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58197874A JPS58197874A (ja) | 1983-11-17 |
| JPH0332230B2 true JPH0332230B2 (ko) | 1991-05-10 |
Family
ID=13732567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57080943A Granted JPS58197874A (ja) | 1982-05-14 | 1982-05-14 | 半導体装置およびその製法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58197874A (ko) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0669083B2 (ja) * | 1984-01-28 | 1994-08-31 | 株式会社東芝 | 半導体メモリの製造方法 |
| JPS6355955A (ja) * | 1986-08-26 | 1988-03-10 | Nec Corp | 半導体装置 |
| JPS63161641A (ja) * | 1986-12-25 | 1988-07-05 | Nec Corp | 半導体記憶装置 |
| US4849363A (en) * | 1988-03-18 | 1989-07-18 | Digital Equipment Corporation | Integrated circuit having laser-alterable metallization layer |
| EP1340262A2 (en) * | 2000-11-27 | 2003-09-03 | Koninklijke Philips Electronics N.V. | Poly fuse rom with mos device based cell structure and the method for read and write therefore |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567467A (en) * | 1979-07-02 | 1981-01-26 | Nec Corp | Semiconductor memory device |
| JPS5685846A (en) * | 1979-12-14 | 1981-07-13 | Fujitsu Ltd | Semiconductor integrated circuit device |
-
1982
- 1982-05-14 JP JP57080943A patent/JPS58197874A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS567467A (en) * | 1979-07-02 | 1981-01-26 | Nec Corp | Semiconductor memory device |
| JPS5685846A (en) * | 1979-12-14 | 1981-07-13 | Fujitsu Ltd | Semiconductor integrated circuit device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58197874A (ja) | 1983-11-17 |
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