JPH03297150A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To miniaturize the size of a gate electrode by obliquely etching an insulating film with resist as a mask to form a fine insulating film opening pattern, and further etching the resist of lower layer with the film as a mask. CONSTITUTION:An active layer 2, a resist 3, an insulating film 4 and a resist 5 are deposited on a substrate 1. Then, with the opening pattern of the resist 5 as a mask the film 4 is obliquely etched by reactive ion beam etching. Thereafter, the resist 3 is etched, the layer 2 is further etched in a desired thickness. The resists 5a, 5b are removed, and the resists 3a, 3b are etched from the sidewall. Further, gate metal 8 is deposited on the entire substrate 1, and the resists 3a, 3b, the films 4a, 4b, the gate metals 8a, 8b are removed. Thus, the size of a gate electrode can be miniaturized to improve the performance of a semiconductor device and to reduce its cost.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device that realizes a fine recessed gate electrode on a semiconductor substrate.

[Conventional technology]

FIG. 3 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device having a recessed gate electrode. In the figure, 1 is a semi-insulating substrate, 2 is an active layer, 5 is a resist, 7 is a recess, and 8
is a three-gate metal serving as a gate electrode.

Next, the manufacturing method will be explained.

After forming the active layer 2 on the semi-insulating substrate 1 by epitaxial growth or implanting impurity ions into the semi-insulating substrate 1 and annealing, a resist was applied and a punched pattern with an opening size M was transferred. 3(a).

Next, using the resists 5a and 5b as masks, the active layer 2 is etched and sown to a desired thickness, resulting in the result as shown in FIG. 3(b). Next, a gate metal 8, which will become a gate electrode, is deposited on the entire surface of the semi-insulating substrate 1 by a vapor deposition method with good directionality, resulting in the result as shown in FIG. 3(C).

Next, as shown in FIG. 3(d), the gate metals 8a and 8b are soaked in acetone or the like and removed by a lift-off method together with the resists 5a and 5b, thereby forming a recessed gate electrode.

Generally, the shorter the gate electrode length is, the more advantageous it is in terms of high-speed operation of semiconductor devices such as field effect transistors. The gate electrode length is equal to the opening size M of the resists 5a and 5b in FIG. 3(a), and the resist opening size M
The fine processing limit is determined by the performance of the device that exposes the resist 5.

[Problem to be solved by the invention]

The conventional manufacturing method of a semiconductor device having a recessed gate electrode is configured as described above, so when improving the performance of a semiconductor device, this performance is Limited by performance,
Furthermore, this exposure apparatus has the problem of being expensive.

This invention was made in order to solve the above-mentioned problems, and it is possible to easily form a gate electrode with a finer gate length than the microfabrication limit of exposure equipment with good controllability, and to achieve high performance. The object of the present invention is to obtain a method for manufacturing a semiconductor device that can realize a recessed gate electrode.

[Means to solve the problem]

A method for manufacturing a semiconductor device according to the present invention includes performing RIB E on a lower insulating film from an oblique direction onto a substrate using a resist as a mask.
(Reactive Ion Beam Etchi
ng) etched with a wIA device, which has a parallelogram cross-sectional shape and is finer than the resist pattern opening size.
In addition to forming a thin film-like pattern, the resist underlying the insulating film is etched using the insulating film as a mask, so that a fine pattern for forming a gate electrode can be formed.

[Effect]

In the method for manufacturing a semiconductor device according to the present invention, the underlying insulating film is etched obliquely using the resist opening pattern as a mask, taking advantage of the good straightness and parallelism of the ion beam of the RIBB device. The cross-sectional shape of is a parallelogram, and when observed from above the semi-insulating substrate, the opening size of the insulating film is smaller than the opening size of the upper resist pattern. In other words, the microfabrication limit of the insulating film opening pattern can be reduced significantly more than the microfabrication limit of the resist pattern, and the microfabrication limit is no longer limited by the performance of the exposure apparatus. Further, the insulating film opening size can be easily calculated from the resist film thickness, the insulating film thickness, and the incident angle of the ion beam of the RIBE apparatus onto the substrate, and has good controllability.

The dimension of the opening in the insulating film is the same as the dimension of the gate electrode of the semiconductor device, and it is possible to improve the performance of the semiconductor device.

〔Example〕 An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1(a) to 1(q) are sectional views showing main steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

In the figure, 1 is a semi-insulating substrate, 2 is an active layer, 3 is a resist (first resist), 4 is an insulating film, 5a and 5b are resists (second resist), and 6 is an ion beam of the RIBE device. In the incident direction, 7 is a recess, 8a, 8b, and 8c are gate metals serving as gate electrodes, and 8 is a gate electrode.

Next, the manufacturing method will be explained.

First, as shown in FIG. 1(a), an active layer 2 is formed by epitaxial growth on a semi-insulating substrate 1 or by ion implantation and annealing into the substrate 1. As shown in FIG.

Thereafter, a first resist 3 is applied to the entire surface of the substrate 1, an insulating film 4 is deposited over the entire surface of the substrate 1, and a resist 5 is further applied to the entire surface of the substrate 1.

After that, resist patterns 5a and 5b having an opening size M are formed above the gate electrode formation region, and using these as masks, a CF is applied to the substrate 1 from an oblique direction at an incident angle θ using a RIBE apparatus.

The insulating film 4 is etched using a gas such as.

Here, the total film thickness of the insulating film 4 and the resist 5 is assumed to be d.

A cross-sectional view after etching is shown in FIG. 1(b). The insulating film opening dimension (L") when observed from above the substrate 1 is determined by the following equation.

L'=M-dtanθ Next, the entire surface of the substrate 1 is subjected to RIE (Reac
Resist 3 using tive ion etching) etc.
When etched, the result is as shown in Figure 1 (C).

Next, the active layer 2 is etched to a desired thickness, as shown in FIG. 1(d). In this case, if the main component of the active layer 2 is GaAs, the etching solution may be, for example, a mixture of tartaric acid and water (1:40).

Next, the resists 5a and 5b are removed by soaking in acetone etc. for a short time, and at the same time, the resists 3a and 3
When b is etched from the side wall, it becomes as shown in FIG. 1(e).

Next, gate metal 8 is applied to the entire surface of substrate 1 using EB (elect).
When deposited by evaporation method (ron beam), it becomes as shown in Fig. 1).

Next, the resist 3a is formed by thoroughly soaking it in acetone or the like.

3b, insulating films 4a, 4b, and gate metals 8a, 8b are simultaneously removed by a lift-off method to obtain the structure shown in FIG.

As described above, the gate electrode length (L) coincides with the aperture size (Lo) of the insulating film 4 and can be formed with good controllability. The length can be shortened.

Further, as shown in FIG. 1(e), the gate metal 8a shown in FIG. 1(f) was slightly etched on the side wall of the resist 3 by immersing it in acetone or the like.

This is done in order to prevent the gate electrode 8b from coming into contact with the gate electrode 8c and to facilitate the subsequent lift-off process. Therefore, due to reasons such as the depth of the recess 8 being deep, the gate metal 8
If separation is easy, it is unnecessary to remove the resist 5 by soaking it in acetone or the like and to perform sidewall etching of the resist 3. If the subsequent process is performed, in other words, the gate metal 8 can be spread over the entire surface of the substrate 1. After deposition and lift-off, a cross-sectional view exactly the same as that shown in FIG. 1 ((a)) can be obtained.

In the above embodiments, the resist 3 may be a thin film such as an insulating film or a metal film having a different composition from the insulating film 5;
The insulating film 5 may be a metal film.

As another application example of the above embodiment, a method for manufacturing a semiconductor device having a two-stage recessed gate electrode is shown in FIG. 2(a).
~(C) will be explained.

In the figure, 9a and 9b are upper recesses, 10 is a lower recess, and 1 to 8 indicate the same or equivalent parts as in FIG. 1.

After FIG. 1(e), recess etching is further performed,
When the upper recesses 9a, 9b and the lower recess 10 are formed,
Figure 2 (it will look like aJ).

Next, as shown in FIG. 2(b), a gate metal 8 is deposited on the entire surface of the substrate 1.

Next, the resist 3, insulating film 4, and gate metals 8a and 8b are removed by the soft-off method, resulting in a structure as shown in FIG. 2(C).

This application example exhibits the same effects as the above-mentioned embodiment, but in addition, since a two-stage recessed gate electrode is used, the withstand voltage of the semiconductor device can be further increased, and an improvement in the added power efficiency of the device can be expected.

〔Effect of the invention〕

As described above, according to the present invention, the underlying insulating film is etched onto the substrate from an oblique direction using a RIBE device using a resist as a mask, and has a parallelogram cross-sectional shape and is finer than the opening size of the resist pattern. In addition to forming the insulating film opening pattern, the resist below the insulating film is etched using the insulating film as a mask, making it possible to form a pattern for forming a fine gate electrode.Even if the resist opening size is large, straightness and parallelism can be maintained. By doing good RIBE,
This has the effect that the dimensions of the gate electrode can be miniaturized, and the performance of the semiconductor device can be improved and the price can be reduced.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the main steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a sectional view showing the main steps of a method for manufacturing a semiconductor device according to an applied example of the invention,
FIG. 3 is a sectional view showing a conventional semiconductor device. In the figure, 1 is a semi-insulating substrate, 2 is an active layer, and 3 is a first layer.
4 is an insulating film, 5a and 5b are second resists, 6 is an incident direction of the ion beam of the RIBE device, 7 is a recess, 8 is a gate metal (gate electrode), 9a and 9b are upper recesses, 1o is a It is a lower recess. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (3)

[Claims] (1) forming an active layer on a semi-insulating substrate; applying a first resist on the substrate; forming an insulating film on the first resist; and on the insulating film. a step of applying a second resist to the substrate; a step of transferring an opening pattern for forming a gate electrode to the second resist; and a step of applying the second resist as a mask by reactive ion beam etching from an oblique direction with respect to the substrate. etching the insulating film; using the insulating film as a mask, etching anisotropically in a direction perpendicular to the substrate; etching the active layer in the opening using the second resist as a mask; forming a groove in the active layer; depositing a conductive film on the substrate; removing the second resist and the insulating film and the conductive film on the second resist; A method for manufacturing a semiconductor device, comprising the step of leaving a conductive film. (2) The method of manufacturing a semiconductor device according to claim 1, further comprising: etching the active layer in the opening portion using the second resist as a mask to form a groove in the active layer; A method for manufacturing a semiconductor device, comprising the step of etching a side wall of an opening of the second resist and removing the first resist at the same time between the step of adhering the resist to a substrate. (3) The method of manufacturing a semiconductor device according to claim 2, comprising: etching the second resist opening sidewall and removing the first resist at the same time; and depositing the conductive film on the substrate. A method for manufacturing a semiconductor device, comprising: etching the active layer using the remaining first resist as a mask to form a two-stage recess opening in the active layer.