JP2893776B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a Schottky barrier field effect transistor (hereinafter abbreviated as GaAsMESFET) operating in an ultra-high frequency band.

[Conventional technology]

In a GaAs MESFET formed by an ion implantation method, a contact layer having a higher impurity concentration than the active layer is formed immediately below the drain and source electrodes provided with resistive contacts in order to improve the performance. In the case of high-power GaAsFETs, the distance from the gate edge to the drain-side contact layer must be larger than the source side in order to improve the drain-gate breakdown voltage, and these gate-drain and source electrodes have complicated positions. To form devices with high accuracy
The manufacturing method shown in FIGS.

According to the prior art, after forming the active layer 2 by ion implantation (FIG. 1A), a high melting point metal 11 is applied as a gate electrode material (FIG. 2B). The refractory metal 11 is processed by reactive ion etching to form a gate electrode (FIG. 3C), and thereafter an insulating film 12 is grown (FIG. 3C), and a photoresist pattern 13 is formed on the insulating film 12. Formed (FIG. (E)), an insulating film is formed by reactive ion etching.
Perform 12 patterning. Using the gate electrode 11 and the insulating film 12 thus processed as a mask, a contact layer below the drain and source electrodes, that is, a layer having a higher impurity concentration than the active layer is formed by ion implantation.

[Problems to be solved by the invention]

In the above-described manufacturing process, when the contact layer is formed by ion implantation, of the portions covered with the insulating film 12, except for the portion near the gate stop side wall, that is, the portion where the thickness of the insulating film layer is large, Through injection is performed on the GaAs substrate via the insulating film. The layer formed by this through implantation (hereinafter referred to as n 'layer) serves to compensate for a damage layer generated near the GaAs surface at the time of reactive ion etching during gate processing in FIG. 2 (c). However, the difference in the formed injection profile causes a large difference in how the gate-drain breakdown voltage, drain resistance, and damage layer are compensated, so the design of the n 'layer is important to improve RF characteristics. Becomes

The formation of the n 'layer is determined by the thickness of the insulating film layer and the conditions for implanting the contact layer.
Since the design of the distance between the gates is limited, it is impossible to design the n 'layer independently.

[Means for solving the problem]

A method for manufacturing a semiconductor device according to the present invention includes a step of forming an active layer containing impurities on a semi-insulating GaAs substrate, a step of selectively forming a gate electrode on the active layer, and a step of forming an entire surface including the gate electrode. Forming an insulating film, etching the entire surface of the insulating film by reactive ion etching such that the insulating film remains on the active layer and the gate electrode by a predetermined thickness, and Selectively forming a mask material, and selectively removing portions of the insulating film that are not covered by the mask material by reactive ion etching to form the gate on both side walls of the gate electrode and the active layer. Leaving the insulating film in a portion extending from one side wall of the electrode, and forming a contact layer having a higher impurity concentration than the active layer in the active layer by ion implantation And is characterized by including.

〔Example〕

 Next, the present invention will be described in more detail with reference to the drawings.

1 (a) to 1 (d) show an embodiment of the present invention in the order of steps. After an active layer 2 is formed on a semi-insulating GaAs substrate 1 by ion implantation, a high-melting-point metal WSi11 is coated on the entire surface, and a gate electrode 11 'is formed by photoresist processing and reactive ion etching. For growing SiO ₂ 12 (FIG. 1 (a)). The above is the same as the conventional process. Next, the entire surface of SiO ₂ is etched by reactive ion etching to obtain a desired film thickness on the flat portion (FIG. 1B). Although the subsequent processes are the same as the prior art (FIG. 2 (e) ~ (g)) , SiO 2 film was initially attached (l _S of FIG. 1 (c)) the side wall of the case source It is determined by the film thickness of 12, and does not change by the addition of the reactive ion etching process according to the present invention.

In the embodiment described above, instead of SiO ₂ of the insulating film 12, another insulating film capable of reactive ion etching such as SiN can be used.

〔The invention's effect〕

According to the present invention, without changing the amount of side wall on the source side,
The thickness of the insulating film can be selected when the n 'layer is formed by the through injection, and the thickness of the insulating film determined to determine the distance between the source-side contact layer and the gate, and the thickness of the contact layer corresponding to the design of the contact layer By selecting the thickness of the insulating film 12 'for the implantation conditions, the design of the n' layer can be performed independently, so that a device with high gate-drain breakdown voltage and low drain resistance can be obtained, and a high-performance, high-output GaAs FET. Can be expected to be realized.

[Brief description of the drawings]

1 (a) to 1 (d) are sectional views showing an embodiment in the order of steps, and FIGS. 2 (a) to 2 (g) are sectional views showing the prior art in the order of steps. 1 ... Semi-insulating GaAs substrate, 2 ... Active layer, 3,3 '... n ⁺
Layer 4, contact layer, 11 WSi, 11 'WSi gate electrode, 12 insulating film, 12' insulating film, 13 photoresist at the time of sidewall processing.

Claims (1)

(57) [Claims] A step of forming an active layer containing impurities on a semi-insulating GaAs substrate; a step of selectively forming a gate electrode on the active layer; and forming an insulating film on the entire surface including the gate electrode. A step of etching the insulating film entirely by reactive ion etching so that the insulating film remains on the active layer and the gate electrode by a predetermined thickness; and selectively masking the insulating film on the insulating film. And selectively removing portions of the insulating film that are not covered by the mask material by reactive ion etching to thereby remove both side walls of the gate electrode and one side wall of the gate electrode on the active layer And forming a contact layer having a higher impurity concentration than the active layer in the active layer by ion implantation. Semiconductor device manufacturing method.