JPH03293768A - Field-effect transistor - Google Patents

Field-effect transistor

Info

Publication number
JPH03293768A
JPH03293768A JP9672690A JP9672690A JPH03293768A JP H03293768 A JPH03293768 A JP H03293768A JP 9672690 A JP9672690 A JP 9672690A JP 9672690 A JP9672690 A JP 9672690A JP H03293768 A JPH03293768 A JP H03293768A
Authority
JP
Japan
Prior art keywords
cylindrical
gate
channel
substrate
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9672690A
Other languages
Japanese (ja)
Inventor
Kazuhiko Toda
戸田 和彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9672690A priority Critical patent/JPH03293768A/en
Publication of JPH03293768A publication Critical patent/JPH03293768A/en
Pending legal-status Critical Current

Links

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PURPOSE:To make a large electric current flow even when a transistor itself is small-sized by a method wherein the structure of the transistor is formed to be three-dimensional, a substrate, an oxide film, a drain, a source and a gate are arranged in a cylindrical shape by using a ground as an axis and a channel is formed to be cylindrical. CONSTITUTION:The structure of a transistor is formed to be three-dimensional; a substrate 6', an insulating film 2', a gate 5', a source 4' and a drain 3' are arranged in a cylindrical shape by using a ground 1 ' as an axis; a channel is formed to be cylindrical. When a prescribed voltage is applied to the cylindrical gate 5', the cylindrical channel is induced at a part along the gate 5' of the substrate 6'. An electric current can be made to flow between the drain region 3' and the source region 4' through the cylindrical channel. Thereby, even when the transistor itself is small-sized, a large electric current can be made to flow.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電界効果トランジスタに関し、特にその電極溝
造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a field effect transistor, and particularly to an electrode groove structure thereof.

〔従来の技術〕[Conventional technology]

一般に電界効果トランジスタは、2次元構造を有してお
ジ、チャネルは平面状に形成される。
Generally, a field effect transistor has a two-dimensional structure, and a channel is formed in a planar shape.

第2図は2次元構造でチャネルが平面状に形成される従
来の電界効果トランジスタの構成を示す断面図である。
FIG. 2 is a cross-sectional view showing the structure of a conventional field effect transistor having a two-dimensional structure and a planar channel.

同図において、1はグランド、2は絶縁膜、3はドレイ
ン領域、4はソース領域、5はゲート、6は基板である
In the figure, 1 is a ground, 2 is an insulating film, 3 is a drain region, 4 is a source region, 5 is a gate, and 6 is a substrate.

このように構成された電界効果トランジスタにおいて、
ゲート5に正の電圧が印加されると、基板6のゲート5
に浴った部分で転移が起シ、チャネルが形成されてドレ
イン領域3とソース領域4が導通し電流を流すことがで
きる。
In the field effect transistor configured in this way,
When a positive voltage is applied to the gate 5, the gate 5 of the substrate 6
Dislocation occurs in the exposed portion, a channel is formed, and the drain region 3 and source region 4 are brought into conduction, allowing current to flow.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、従来の電界効果トランジスタは、2次元
構造となっていたので、チャネルは平面となり、ドレイ
ン領域3とソース領域4との間に大電流を流そうとする
と、トランジスタ自体を大きく形成しなければならない
という問題があった。
However, since conventional field effect transistors have a two-dimensional structure, the channel is flat, and in order to flow a large current between the drain region 3 and source region 4, the transistor itself must be made large. The problem was that it didn't.

この発明は、前述した問題を解消するためになされたも
ので、トランジスタ自体の大きさが小さくても大事流が
流せる電界効果トランジスタを得ることを目的としてい
る。
The present invention was made to solve the above-mentioned problems, and its purpose is to obtain a field effect transistor that allows a large current to flow even if the size of the transistor itself is small.

〔課題を解決するための手段〕[Means to solve the problem]

この発明による電界効果トランジスタは、トランジスタ
の構造を3次元にしてグランドを軸として基板、絶縁膜
、ゲート、ソース、ドレインを円筒状に配置してチャネ
ルを円筒状に形成するようにし九ものである。
The field effect transistor according to the present invention has a three-dimensional transistor structure in which a substrate, an insulating film, a gate, a source, and a drain are arranged in a cylindrical shape with the ground as an axis, and a channel is formed in a cylindrical shape. .

〔作用〕[Effect]

この発明においては、円筒状のゲートに所定の電圧が印
加されることによって誘起されるチャネルは円筒状とな
る。
In this invention, the channel induced by applying a predetermined voltage to the cylindrical gate becomes cylindrical.

〔実施例〕〔Example〕

第1図はこの発明の一実施例を示す電界効果トランジス
タの構成を示す図であシ、同図(、)は斜視図、同図(
b)は同図(息)のグランド1′に沿った断面図である
。同図において、1′はグランド、2′・・・1絶縁膜
、3′はドレイン領域、4′はソース領域、5′はゲー
ト、6′は基板である。
FIG. 1 is a diagram showing the configuration of a field-effect transistor showing an embodiment of the present invention.
b) is a sectional view taken along the ground 1' in the same figure. In the figure, 1' is a ground, 2'...1 insulating film, 3' is a drain region, 4' is a source region, 5' is a gate, and 6' is a substrate.

このように構成された電界効果トランジスタにおいて、
円筒状のゲート5′に所定の電圧が印加されると、基板
6′のゲート5′に溢った部分に円筒状のチャネルが誘
起される。この円筒状のチャネルを通してドレイン領域
3′とソース領域4′との間に電流を流すことができる
In the field effect transistor configured in this way,
When a predetermined voltage is applied to the cylindrical gate 5', a cylindrical channel is induced in the portion of the substrate 6' overflowing the gate 5'. Current can flow between the drain region 3' and the source region 4' through this cylindrical channel.

このような構成によると、チャネルが日間状に形成する
ので、トランジスタ自体の大きさが小さくても、チャネ
ルのドレイン領域3′とソース領域41とに接する部分
の長さは長くできる。したがってドレイン領域3′とソ
ース領域4′との間に大きな電流を流すことができる。
According to this structure, since the channel is formed in the shape of a diagonal, the length of the portion of the channel in contact with the drain region 3' and the source region 41 can be made long even if the size of the transistor itself is small. Therefore, a large current can flow between the drain region 3' and the source region 4'.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、電界効果トランジ
スタの構造を3次元にしてグランドを軸として円筒状に
基板、酸化膜、ドレイ/、ソースおよびゲートを配置し
てチャネルが円筒状に形成されるようにしたので、トラ
ンジスタ自体が小さくても大電流を流すことができると
いう極めて優れた効果が得られる。
As explained above, according to the present invention, the structure of the field effect transistor is made three-dimensional, and the substrate, oxide film, drain/source, and gate are arranged in a cylindrical shape with the ground as the axis, and the channel is formed in a cylindrical shape. Therefore, even if the transistor itself is small, a large current can flow, which is an extremely excellent effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明による電界効果トランジスタの構成を
示す図、第2図は従来の電界効果トランジスタの構成を
示す断面図である。 1′・O・・グランド、2′・+1−・絶縁膜、3′争
・・・ドレイン領域、4′・・−[株]ソース領域、5
′・・・・ゲート、6′・・・・基板。
FIG. 1 is a diagram showing the structure of a field effect transistor according to the present invention, and FIG. 2 is a sectional view showing the structure of a conventional field effect transistor. 1', O...Ground, 2', +1-, Insulating film, 3', Drain region, 4'...- Source region, 5
′...Gate, 6′...Substrate.

Claims (1)

【特許請求の範囲】[Claims]  電界効果トランジスタにおいて、グランドを軸として
円筒状に基板、酸化膜、ドレイン、ソースおよびゲート
を配置し、チャネルを円筒状に形成したことを特徴とす
る電界効果トランジスタ。
A field effect transistor characterized in that a substrate, an oxide film, a drain, a source, and a gate are arranged in a cylindrical shape with the ground as an axis, and a channel is formed in a cylindrical shape.
JP9672690A 1990-04-11 1990-04-11 Field-effect transistor Pending JPH03293768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9672690A JPH03293768A (en) 1990-04-11 1990-04-11 Field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9672690A JPH03293768A (en) 1990-04-11 1990-04-11 Field-effect transistor

Publications (1)

Publication Number Publication Date
JPH03293768A true JPH03293768A (en) 1991-12-25

Family

ID=14172740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9672690A Pending JPH03293768A (en) 1990-04-11 1990-04-11 Field-effect transistor

Country Status (1)

Country Link
JP (1) JPH03293768A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009038201A (en) * 2007-08-01 2009-02-19 Elpida Memory Inc Semiconductor device and manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009038201A (en) * 2007-08-01 2009-02-19 Elpida Memory Inc Semiconductor device and manufacturing method of semiconductor device

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