JPS6228787Y2 - - Google Patents

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Publication number
JPS6228787Y2
JPS6228787Y2 JP7945980U JP7945980U JPS6228787Y2 JP S6228787 Y2 JPS6228787 Y2 JP S6228787Y2 JP 7945980 U JP7945980 U JP 7945980U JP 7945980 U JP7945980 U JP 7945980U JP S6228787 Y2 JPS6228787 Y2 JP S6228787Y2
Authority
JP
Japan
Prior art keywords
region
drain
comb
source
gate region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7945980U
Other languages
Japanese (ja)
Other versions
JPS574249U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7945980U priority Critical patent/JPS6228787Y2/ja
Publication of JPS574249U publication Critical patent/JPS574249U/ja
Application granted granted Critical
Publication of JPS6228787Y2 publication Critical patent/JPS6228787Y2/ja
Expired legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)

Description

【考案の詳細な説明】 本考案は接合型電界効果トランジスタの改良に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in junction field effect transistors.

従来の接合型電界効果トランジスタは第1図に
示す如く、ドレイン領域1とドレイン領域1を囲
むゲート領域2とゲート領域2を囲むソース領域
3を備え、チヤンネル巾を大きくして高gmを得
るためにゲート領域2を櫛歯状に曲折して構成し
ていた。
As shown in FIG. 1, a conventional junction field effect transistor includes a drain region 1, a gate region 2 surrounding the drain region 1, and a source region 3 surrounding the gate region 2, in order to increase the channel width and obtain a high gm. The gate region 2 was bent into a comb-teeth shape.

斯る接合型電界効果トランジスタではソースお
よびドレイン領域3,1表面にソースおよびドレ
インコンタクト領域4,5を設け、ソースおよび
ドレインコンタクト領域4,5からゲート領域2
までのソースおよびドレイン領域3,1のパスの
長さをほぼ等しくなる様に設計していた。しかし
ながら斯るパターンは低電圧で用いる場合は何ら
問題を発生しないが、高耐圧構造としては全く適
していない。即ちドレインゲート間は逆バイアス
されて使用されるためドレイン領域1のドレイン
コンタクト領域5の櫛歯状の先端部で電界が集中
してなだれ降伏を起してしまう。
In such a junction field effect transistor, source and drain contact regions 4 and 5 are provided on the surfaces of the source and drain regions 3 and 1, and gate regions 2 and 2 are formed from the source and drain contact regions 4 and 5.
The path lengths of the source and drain regions 3 and 1 were designed to be approximately equal. However, although such a pattern does not cause any problems when used at low voltage, it is not suitable at all for a high voltage structure. That is, since the region between the drain and gate is used with a reverse bias, the electric field is concentrated at the comb-like tip of the drain contact region 5 of the drain region 1, causing avalanche breakdown.

本考案は斯点に鑑みてなされたものであり、第
2図を参照して本考案の一実施例を詳述する。
The present invention has been devised in view of this point, and one embodiment of the present invention will be described in detail with reference to FIG.

本考案に依る接合型電界効果トランジスタは第
2図に示す如く、ドレイン領域11とドレイン領
域11を囲むゲート領域12とゲート領域12を
囲むソース領域13を備え、ゲート領域12下の
チヤンネル領域の巾を大きくして高gmとするた
めゲート領域12を櫛歯状に曲折している。ソー
スおよびドレイン領域13,11表面にはコンタ
クト取出しのためにソースおよびドレインコンタ
クト領域14,15を設けられ互いに櫛歯状に入
り組んで形成される。
As shown in FIG. 2, the junction field effect transistor according to the present invention includes a drain region 11, a gate region 12 surrounding the drain region 11, and a source region 13 surrounding the gate region 12. In order to increase gm and obtain a high gm, the gate region 12 is bent into a comb-like shape. Source and drain contact regions 14 and 15 are provided on the surfaces of the source and drain regions 13 and 11 for contact extraction, and are intertwined with each other in a comb-like shape.

本考案の特徴はドレインコンタクト領域15の
形状にある。ドレインコンタクト領域15の櫛歯
状に突出した先端部を短かく形成して先端部から
前記ゲート領域12までの櫛歯方向のパスbを他
の部分のパスaよりも長く設計している。
A feature of the present invention lies in the shape of the drain contact region 15. The comb-like protruding tip of the drain contact region 15 is formed short, and the path b in the comb-tooth direction from the tip to the gate region 12 is designed to be longer than the path a in other parts.

本考案者はチヤンネル領域の比抵抗8Ωcm、基
板比抵抗30Ωcm、ゲート領域12長3μmの接合
型電界効果トランジスタで実験を行つたところ、
従来の構造(a=10μm)では耐圧が170Vであ
つたものが本考案の構造(a=10μm、b=15μ
m)では耐圧が240Vに向上できた。
The present inventor conducted an experiment using a junction field effect transistor with a channel region resistivity of 8 Ωcm, a substrate resistivity of 30 Ωcm, and a gate region 12 length of 3 μm.
The conventional structure (a = 10μm) had a breakdown voltage of 170V, but the structure of the present invention (a = 10μm, b = 15μm)
m), the withstand voltage was improved to 240V.

以上に詳述した如く本考案に依れば電界の集中
し易いドレインコンタクト領域の櫛歯状の先端部
からゲート領域までの櫛歯方向のパスを他の部分
より長くすることによつて容易に耐圧を向上でき
る有益なものである。
As described in detail above, according to the present invention, the path in the comb-like direction from the comb-like tip of the drain contact region where electric fields tend to concentrate to the gate region is made longer than other parts. This is useful because it can improve pressure resistance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を説明する平面図、第2図は本
考案を説明する平面図である。なを第1図および
第2図は一点破線で線対象となるので半分省略し
ている。 11はドレイン領域、12はゲート領域、13
はソース領域、14はソースコンタクト領域、1
5はドレインコンタクト領域である。
FIG. 1 is a plan view for explaining a conventional example, and FIG. 2 is a plan view for explaining the present invention. In FIGS. 1 and 2, half of the figures are omitted because they are symmetrical with dashed lines. 11 is a drain region, 12 is a gate region, 13
is a source region, 14 is a source contact region, 1
5 is a drain contact region.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ドレイン領域と該ドレイン領域を囲むゲート領
域と該ゲート領域を囲むソース領域とを具備し前
記ゲート領域を櫛歯状に曲折してチヤンネル巾を
大きくする接合型電界効果トランジスタに於い
て、前記ソースおよびドレイン領域表面に互いに
櫛歯状に入り組んだソースおよびドレインコンタ
クト領域を設け、前記ドレインコンタクト領域か
ら前記ゲート領域までのパスのうち前記ドレイン
コンタクト領域の前記櫛歯状の先端部から前記ゲ
ート領域までの櫛歯方向のパスを他の部分より大
きくすることを特徴とする接合型電界効果トラン
ジスタ。
In a junction field effect transistor comprising a drain region, a gate region surrounding the drain region, and a source region surrounding the gate region, the gate region is bent into a comb-teeth shape to increase the channel width. Source and drain contact regions are provided on the surface of the drain region, and the source and drain contact regions are intertwined with each other in a comb-like shape, and the path from the comb-like tip of the drain contact region to the gate region is A junction field effect transistor characterized by having a path in the comb tooth direction larger than other parts.
JP7945980U 1980-06-06 1980-06-06 Expired JPS6228787Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7945980U JPS6228787Y2 (en) 1980-06-06 1980-06-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7945980U JPS6228787Y2 (en) 1980-06-06 1980-06-06

Publications (2)

Publication Number Publication Date
JPS574249U JPS574249U (en) 1982-01-09
JPS6228787Y2 true JPS6228787Y2 (en) 1987-07-23

Family

ID=29441941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7945980U Expired JPS6228787Y2 (en) 1980-06-06 1980-06-06

Country Status (1)

Country Link
JP (1) JPS6228787Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6238789B2 (en) * 2014-02-26 2017-11-29 株式会社豊田中央研究所 Semiconductor device

Also Published As

Publication number Publication date
JPS574249U (en) 1982-01-09

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