JPH03290952A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPH03290952A
JPH03290952A JP9188690A JP9188690A JPH03290952A JP H03290952 A JPH03290952 A JP H03290952A JP 9188690 A JP9188690 A JP 9188690A JP 9188690 A JP9188690 A JP 9188690A JP H03290952 A JPH03290952 A JP H03290952A
Authority
JP
Japan
Prior art keywords
brazing
spacer
semiconductor package
thermal expansion
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9188690A
Other languages
Japanese (ja)
Inventor
Hiroaki Doi
土居 博昭
Toshio Hatsuda
初田 俊雄
Takahiro Oguro
崇弘 大黒
Tetsuya Hayashida
哲哉 林田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9188690A priority Critical patent/JPH03290952A/en
Publication of JPH03290952A publication Critical patent/JPH03290952A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors

Abstract

PURPOSE:To prevent the breakdown of solder balls by constructing a solder- joined part by soldering a spacer which has a thermal expansion coefficient being equal to the one of a base and a cap in the direction parallel with a soldering face and to the one of the balls in the direction vertical to the face. CONSTITUTION:A spacer 7 is put in a solder-joined part between a cap 4 and a base 3 so that a solder material or the like 5 is thereby divided in the direc tion of the thickness thereof. For the spacer 7, a laminated body of an anisotropic material or the like which has about the same thermal expansion coefficient as the solder material in the direction vertical to a soldering face and has a low thermal expansion coefficient being equal to the one of a package material in the direction parallel with the soldering face. Since the thickness of each solder material 5 is made small according to this constitution, the airtightness of the solder material 5 can be maintained with the amount of thermal expansion in the vertical direction of a package matched with that of balls 2. Accordingly, the breakdown of the solder balls can be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、気密封止構造の半導体パッケージに係り、特
に内部の半導体と基板とを接続するはんだボールの破壊
を防止するに好適な半導体パッケージに関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor package having a hermetically sealed structure, and particularly to a semiconductor package suitable for preventing breakage of solder balls connecting an internal semiconductor and a substrate. Regarding.

〔従来の技術〕[Conventional technology]

従来の半導体気密封止パッケージを特開昭62−249
429号公報記載のものを例にして説明する。従来の半
導体気密封止パッケージには第11図に示すようにLS
IIをはんだボール2でセラミックスなどの配線基板3
に電気接続するものがある。配線基板3には蓋4が封止
ろう材5により接合され、中にり、S11及びはんだボ
ール2が配置されている。このLSIIの発熱量が大き
い場合にはこのLSIIを熱伝導率の大きい材料よりな
る蓋4へ固着ろう材6で固定し、LSIIの発熱は蓋4
へ熱伝導して放熱される。ここで配線基板3の材料とし
てセラミックスが使われる理由はセラミックスの持つ気
密性、耐腐食性、絶縁性、耐熱性などがあげられるが、
本発明に直接に関係がある特徴は低熱膨張性である。L
SIなどの半導体はSiやGaAsなとの熱膨張係数が
低く強度の低い材料が多いため、これらの半導体を接合
する蓋や配線基板等用のパッケージ材料としては半導体
とパッケージ材料の熱膨張係数の差による熱応力が原因
となる半導体の破壊を防ぐために熱膨張係数が低い材料
が必要であり、このためにはたとえばセラミックスが適
している。
The conventional semiconductor hermetically sealed package was published in Japanese Patent Application Laid-open No. 62-249.
The explanation will be given using the one described in Japanese Patent No. 429 as an example. A conventional semiconductor hermetically sealed package has an LS as shown in Figure 11.
II to a wiring board 3 made of ceramics etc. with solder balls 2
There is an electrical connection to the A lid 4 is bonded to the wiring board 3 with a sealing brazing material 5, and S11 and solder balls 2 are placed inside. When the amount of heat generated by this LSII is large, this LSII is fixed to the lid 4 made of a material with high thermal conductivity with a bonding brazing material 6, and the heat generated by the LSII is transferred to the lid 4.
The heat is conducted to and dissipated. The reason why ceramics are used as the material for the wiring board 3 is because of their airtightness, corrosion resistance, insulation, heat resistance, etc.
A feature directly relevant to the present invention is low thermal expansion. L
Semiconductors such as SI are often made of materials with low thermal expansion coefficients and low strength, such as Si and GaAs, so packaging materials for lids, wiring boards, etc. that bond these semiconductors are made by materials with a thermal expansion coefficient of the semiconductor and package material. In order to prevent destruction of the semiconductor due to differential thermal stress, a material with a low coefficient of thermal expansion is required, and ceramics, for example, are suitable for this purpose.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

この第11図に示す構造の半導体パッケージに温度変化
が生じた状態を説明し、従来のパッケージの問題点を示
す。配線基板と蓋が接合されてなるパッケージは上記の
ようにセラミックスなどの半導体と熱膨張を合わせた低
熱膨張の材料を用いるため、温度変化が生じても熱変形
はあまり生じない。これに対して、蓋に接合されたLS
Iと配線基板との間に拘束されたはんだボールはその熱
膨張係数は大きいため、大きな熱変形を生じる。
A state in which a temperature change occurs in the semiconductor package having the structure shown in FIG. 11 will be explained, and problems with the conventional package will be shown. As mentioned above, the package formed by joining the wiring board and the lid uses a material with low thermal expansion that matches that of a semiconductor, such as ceramics, so even if a temperature change occurs, thermal deformation does not occur much. On the other hand, the LS bonded to the lid
Since the solder ball restrained between I and the wiring board has a large coefficient of thermal expansion, it causes large thermal deformation.

このため、例えば温度が低下するとパッケージがほとん
ど熱収縮しないにもかかわらずはんだボールが熱収縮す
るため、はんだボールがパッケージより上下方向にひっ
ばられて、温度変化が大きい場合にはんだボールが破壊
することがある。この従来の構造にはこのような問題点
があった。
For this reason, for example, when the temperature drops, the solder balls shrink due to heat even though the package hardly shrinks, causing the solder balls to be stretched upward and downward from the package, and when the temperature changes are large, the solder balls break. Sometimes. This conventional structure had such problems.

本発明の第1の目的は、半導体と基板を接続するはんだ
ボールの破壊を防止する半導体パッケージを提供するこ
とにあり、また本発明の第2の目的は上記はんだボール
の破壊を防止する半導体パッケージを搭載したコンピュ
ータを提供することにある。
A first object of the present invention is to provide a semiconductor package that prevents the destruction of solder balls connecting a semiconductor and a substrate, and a second object of the present invention is to provide a semiconductor package that prevents the destruction of the solder balls. Our goal is to provide computers equipped with

〔課題を解決するための手段〕[Means to solve the problem]

上記第1の目的を達成するために、本発明の半導体パッ
ケージは、内面に半導体を接合した蓋と、その半導体に
はんだボールを介して接合された基板とを有し、前記基
板の面周縁部でなるろう付け面と前記蓋との間に形成さ
れたろう付け接合部により内部が気密封止された半導体
パッケージにおいて、前記ろう付け接合部は、前記ろう
付け面に平行な方向には前記基板及び蓋と熱膨張係数を
ほぼ等しくし、かつ前記ろう付け面と垂直な方向には前
記はんだボールと熱膨張係数を等しくするスペーサをそ
の両端でろう付けして構成したことを特徴としている。
In order to achieve the above-mentioned first object, a semiconductor package of the present invention includes a lid having a semiconductor bonded to the inner surface, a substrate bonded to the semiconductor via a solder ball, and a peripheral edge of the surface of the substrate. In a semiconductor package whose interior is hermetically sealed by a brazing joint formed between a brazing surface and the lid, the brazing joint is formed between the substrate and the lid in a direction parallel to the brazing surface. It is characterized in that a spacer having a coefficient of thermal expansion substantially equal to that of the lid and having a coefficient of thermal expansion equal to that of the solder ball in a direction perpendicular to the brazing surface is brazed at both ends thereof.

そして本発明の半導体パッケージにおいては、スペーサ
を熱膨張係数の小さい板材と、前記はんだボールと熱膨
張係数をほぼ等しくするろう付け層を交互に設けた積層
体で構成し、前記ろう付け層の合計厚さを前記はんだボ
ールの厚さとほぼ等しくするのがよい。またそのスペー
サを繊維強化複合材料で構成してもよい。
In the semiconductor package of the present invention, the spacer is constituted by a laminate in which plate materials having a small coefficient of thermal expansion and brazing layers having approximately the same coefficient of thermal expansion as the solder balls are alternately provided, and the total of the brazing layers is The thickness is preferably approximately equal to the thickness of the solder ball. Further, the spacer may be made of a fiber-reinforced composite material.

また、本発明の別の半導体パッケージは、内面に半導体
を接合した蓋と、その半導体にはんだボールを介して接
合された基板とを有し、前記基板の面周縁部でなるろう
付け面と前記蓋との間に形成されたろう付け接合部によ
り内部が気密封止された半導体パッケージにおいて、前
記ろう付け接合部を剛性の小さいスペーサをその両端面
でろう付けして構成したことを特徴としている。
Another semiconductor package of the present invention has a lid having a semiconductor bonded to its inner surface, and a substrate bonded to the semiconductor via a solder ball, and a brazing surface formed by a peripheral edge of the surface of the substrate and a A semiconductor package whose interior is hermetically sealed by a brazed joint formed between the lid and the lid, characterized in that the brazed joint is formed by brazing a spacer with low rigidity on both end faces thereof.

そして、本発明の別の半導体パッケージにおいては、ス
ペーサをプラスチックで構成するのがよい。
In another semiconductor package of the present invention, the spacer is preferably made of plastic.

さらに、本発明のまた別の半導体パッケージは、内面に
半導体を接合した蓋と、その半導体にはんだボールを介
して接合された基板とを有し、前記基板の面周縁部でな
るろう付け面と前記蓋との間に形成されたろう付け接合
部により内部が気密封止された半導体パッケージにおい
て、前記ろう付け接合部を一縁が前記基板に近接し他縁
が前記蓋に近接する斜め板でなるスペーサと、そのスペ
ーサの回りを充填するろう材とから構成し、そのろう材
は前記はんだボールと同等の膨張係数を有し、かつ前記
ろう付け接合部の厚さを前記はんだボールの厚さとほぼ
等しくしたことを特徴としている。
Furthermore, another semiconductor package of the present invention includes a lid having a semiconductor bonded to the inner surface thereof, and a substrate bonded to the semiconductor via a solder ball, and a brazing surface formed by a peripheral edge of the surface of the substrate. In a semiconductor package whose interior is hermetically sealed by a brazed joint formed between the brazed joint and the lid, the brazed joint is formed by a diagonal plate having one edge close to the substrate and the other edge close to the lid. It is composed of a spacer and a brazing material filled around the spacer, and the brazing material has an expansion coefficient equivalent to that of the solder ball, and the thickness of the brazed joint is approximately equal to the thickness of the solder ball. It is characterized by being made equal.

そして、本発明のまた別の半導体パッケージにおいては
、スペーサを熱膨張係数の小さい材料により構成するの
がよい。
In yet another semiconductor package of the present invention, the spacer is preferably made of a material with a small coefficient of thermal expansion.

上記第2の目的は、本発明の半導体パッケージあるいは
別の半導体パッケージあるいはまた別の半導体パッケー
ジを搭載したコンピュータにより、達成される。
The second object is achieved by a computer equipped with the semiconductor package of the present invention, another semiconductor package, or another semiconductor package.

〔作用〕[Effect]

半導体と基板とを接続するはんだボールの破壊は、はん
だボールとそれを拘束するパッケージの上下方向の熱膨
張差によるので、これを防止するためにははんだボール
の熱膨張にパッケージの上下方向の熱膨張を合わせるこ
とが必要となる。このためには、パッケージを構成する
蓋と基板を接合するろう材の厚さを、はんだボールと同
定度に厚くすることが第一に考えられるが、単にろう材
の厚さを厚くすると、ろう材を溶融する時にろう材中に
気泡が生じ易く気密性が取れなくなる場合がある。
The destruction of the solder balls that connect the semiconductor and the board is due to the difference in thermal expansion in the vertical direction between the solder ball and the package that restrains it, so in order to prevent this, the thermal expansion of the solder ball is combined with the thermal expansion in the vertical direction of the package. It is necessary to match the expansion. To achieve this, the first idea is to increase the thickness of the brazing material that joins the lid and the board that make up the package so that it is similar to the solder ball. When the material is melted, bubbles tend to form in the brazing material, which may make it impossible to maintain airtightness.

以下に述べる二つの構造ははんだボールの破壊を防止す
るものである。その第一は蓋と基板との間のろう付け接
合部にスペーサをはさんでろう材を厚さ方向に分割する
構造であり、この構造により各ろう材の厚さが薄くなる
ため、パッケージの上下方向の熱膨張量をはんだボール
にあわせたまま、ろう材の気密性を維持できる。この構
造では、各ろう材厚さを極く薄くするにはスペーサが多
数必要となるという欠点がある。第二の構造はこの欠点
を解決するもので、ろう材面に対して傾斜したスペーサ
を用いるものである。この構造によれば1枚のスペーサ
でもスペーサの一部がパッケージの基板に、他部がパッ
ケージの蓋に接近して置かれるため、これらの部分では
ろう材の厚さを薄くでき、ろう材の気密性を維持できる
。このスペーサは具体的には例えば薄い金属板やセラミ
ックス板によって作成される。なお、この材料はろう材
に生じる熱ひずみを低減するために低熱膨張の材料であ
ることが望ましい。
The two structures described below prevent solder balls from breaking. The first is a structure in which the brazing material is divided in the thickness direction by inserting a spacer in the brazed joint between the lid and the substrate.This structure reduces the thickness of each brazing material, so the package The airtightness of the brazing filler metal can be maintained while keeping the amount of vertical thermal expansion in line with the solder ball. This structure has the disadvantage that a large number of spacers are required to make each filler metal extremely thin. A second structure solves this drawback and uses a spacer that is inclined with respect to the surface of the brazing material. According to this structure, even with a single spacer, part of the spacer is placed close to the package substrate and the other part is placed close to the package lid, so the thickness of the brazing material can be reduced in these parts, and the thickness of the brazing material can be reduced. Airtightness can be maintained. Specifically, this spacer is made of, for example, a thin metal plate or a ceramic plate. Note that this material is desirably a material with low thermal expansion in order to reduce thermal strain occurring in the brazing material.

上記二つの構造とは別に、はんだボールの熱膨張にパッ
ケージの上下方向の熱膨張を合わせるために、上記のご
とくろう材の厚さを薄くし多層に構成する代わりに、ろ
う付け接合部に熱膨張係数の大きいスペーサを入れる方
法も考えられる。但し、このスペーサはろう付け面に垂
直な方向にはんだボールと同等な熱膨張をするが、ろう
付け面に平行な方向には低熱膨張のパッケージ材料と同
等な低い熱膨張をすることが必要である。これは、もし
スペーサのろう付け面に平行な方向の熱膨張がパッケー
ジ材料と大きく異なるとスペーサとパッケージ間のろう
材に過大な剪断ひずみが生してろう材が破壊するためで
ある。このスペーサの熱膨張の条件を満足するためには
スペーサ材料としてろう材程度の熱膨張係数を持ち剛性
の小さい材料か、ろう付け面に垂直な方向にろう材程度
の熱膨張係数を持ちろう材面に平行な方向にはパッケー
ジ材料と同等な低い熱膨張係数を持つ異方性材料が必要
である。前者の材料としては、たとえばプラスチックな
どがもちいられ、剛性が小さいために熱膨張がろう材に
より拘束されるためろう材が破壊することが無い。後者
の異方性材料としては、低熱膨張の金属板やセラミック
スと、ろう材またはろう材と同等の熱膨張係数の材料と
の相互積層体や、低熱膨張の繊維の布や直交に引き揃え
た繊維を用いた繊維強化複合材料などの材料が用いられ
る。これらの材料では金属板面内や繊維軸方向に低い熱
膨張係数を持つため熱膨張異方性を持つ。
Apart from the above two structures, in order to match the vertical thermal expansion of the package with the thermal expansion of the solder balls, instead of reducing the thickness of the brazing filler metal and configuring it in multiple layers as described above, heat is applied to the brazed joint. A method of inserting a spacer with a large expansion coefficient is also considered. However, this spacer must have a thermal expansion equivalent to that of a solder ball in a direction perpendicular to the brazing surface, but a low thermal expansion equivalent to a low thermal expansion packaging material in a direction parallel to the brazing surface. be. This is because if the thermal expansion of the spacer in the direction parallel to the brazing surface is significantly different from that of the package material, excessive shear strain will occur in the brazing material between the spacer and the package, causing the brazing material to break. In order to satisfy the thermal expansion conditions for this spacer, the spacer material must be a material with a low rigidity that has a coefficient of thermal expansion similar to that of a brazing filler metal, or a brazing material that has a coefficient of thermal expansion similar to that of a brazing filler metal in the direction perpendicular to the brazing surface. An anisotropic material with a low coefficient of thermal expansion parallel to the plane is required, comparable to the packaging material. As the former material, for example, plastic is used, and because of its low rigidity, thermal expansion is restrained by the brazing material, so that the brazing material does not break. Examples of the latter anisotropic materials include mutual laminates of low thermal expansion metal plates or ceramics and brazing filler metal or materials with a thermal expansion coefficient equivalent to the brazing filler metal, and low thermal expansion fiber cloth or orthogonally aligned materials. Materials such as fiber-reinforced composite materials using fibers are used. These materials have thermal expansion anisotropy because they have a low coefficient of thermal expansion in the plane of the metal plate or in the fiber axis direction.

〔実施例〕〔Example〕

本発明の1実施例を第1図に示す。半導体素子]は、そ
の表側がはんだボール2により配線基板3に接続され、
裏面は蓋4に固着ろう材6により接続されている。蓋4
と配線基板3はそれらの縁部がスペーサ7を介して封止
ろう材5により接合されて、パッケージを構成している
。封止ろう材5は気密性を維持できるように薄くなって
いる。
One embodiment of the invention is shown in FIG. The semiconductor element] has its front side connected to the wiring board 3 by the solder balls 2,
The back surface is connected to the lid 4 by a bonding brazing material 6. Lid 4
The edges of the wiring board 3 and the wiring board 3 are joined by a sealing brazing material 5 via a spacer 7 to form a package. The sealing brazing material 5 is thin so as to maintain airtightness.

スペーサ7は第2All、第2B図に示すように枠形状
を持ち、第2A図の断面1−1が第3図から第5図に示
す異なる3種類の構造のいずれかを持つものである。第
3図に示すスペーサ7aは、表面全体にメタライズ膜9
を施した複数の低熱膨張のコバール板8(29%Ni−
17%Co−Fe合金)をろう材10により相互に接合
したものである。第4図は、熱膨張異方性をもつスペー
サとして炭素繊維11の平織りクロスと銅線12の複合
材料で構成したもので、その表面にメタライズ9を施し
たスペーサ7bを示している。第5図は、剛性の小さい
スペーサとして表面にメタライズ膜9を施したポリイミ
ド部材13からなるスペーサ7cを示している。メタラ
イズ9はろう材のぬれ性を向上するためのものである。
The spacer 7 has a frame shape as shown in FIGS. 2All and 2B, and the cross section 1-1 in FIG. 2A has one of three different structures shown in FIGS. 3 to 5. The spacer 7a shown in FIG. 3 has a metallized film 9 on the entire surface.
A plurality of low thermal expansion Kovar plates 8 (29% Ni-
17% Co--Fe alloy) are mutually joined by a brazing filler metal 10. FIG. 4 shows a spacer 7b which is made of a composite material of a plain-woven cloth of carbon fibers 11 and a copper wire 12 as a spacer having thermal expansion anisotropy, and whose surface is metallized 9. FIG. 5 shows a spacer 7c made of a polyimide member 13 whose surface is coated with a metallized film 9 as a spacer with low rigidity. The metallization 9 is for improving the wettability of the brazing material.

本発明の別の実施例を第6図に示す。本実施例の構成は
第1図とは、ぼ同様であるが、複数の薄板スペーサ14
により封止ろう材5を分割している点が異なる。各薄板
スペーサ14の形状は第7A図、第7B図に示すように
ろう材のぬれ性を向上するためのメタライズ9を表面に
施した薄いコバール板8aでなる枠状である。
Another embodiment of the invention is shown in FIG. The configuration of this embodiment is almost the same as that in FIG. 1, but a plurality of thin plate spacers 14
The difference is that the sealing brazing material 5 is divided by. As shown in FIGS. 7A and 7B, each thin plate spacer 14 is in the form of a frame made of a thin Kovar plate 8a whose surface is coated with metallization 9 to improve the wettability of the brazing material.

本発明の更に別の実施例を第8図に示す。本発明の構成
は第6図とほぼ同様であるが、−枚の傾斜スペーサ15
が傾斜して封止ろう材5を分割している。傾斜スペーサ
15の形状は第9A図、第9B図に傾斜スペーサ15a
として示すように断面が傾斜した薄いコバール板8でメ
タライズ9を表面にほどこしである。メタライズ9はろ
う材のぬれ性を向上するためのものである。
Yet another embodiment of the invention is shown in FIG. The configuration of the present invention is almost the same as that shown in FIG.
is inclined to divide the sealing brazing material 5. The shape of the inclined spacer 15 is shown in FIGS. 9A and 9B.
As shown in the figure, a thin Kovar plate 8 with an inclined cross section is coated with metallization 9 on its surface. The metallization 9 is for improving the wettability of the brazing material.

また第10A図、第10B図には別の傾斜スペーサ15
bを示す。この傾斜スペーサ15bは第9A図に示すス
ペーサの4つの角部の外周にスリット16を入れて変形
能をより増したものである。
Further, FIGS. 10A and 10B show another inclined spacer 15.
b. This inclined spacer 15b has slits 16 on the outer periphery of the four corners of the spacer shown in FIG. 9A to further increase its deformability.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、半導体パッケージにおいて、蓋と基板
縁部との間に形成されたろう付け接合部は、蓋と基板と
の間にあって半導体と基板とを接続するはんだボールと
、熱膨張性質が同等のスペーサを、または剛性の小さい
スペーサを入れて、そのスペーサの両端をろう付けする
ことにより構成されるので、ろう付け部を薄くして、ろ
う付け部の気泡発生を防止でき、半導体パッケージの気
密性を保持できると共に、はんだボールの破壊を防止す
るこ′とができるという効果がある。
According to the present invention, in a semiconductor package, the brazed joint formed between the lid and the edge of the substrate has the same thermal expansion property as the solder ball that is between the lid and the substrate and connects the semiconductor and the substrate. It is constructed by inserting a spacer or a spacer with low rigidity and brazing both ends of the spacer, so the soldered part can be made thinner and air bubbles can be prevented from forming in the soldered part, making the semiconductor package airtight. This has the effect of not only being able to maintain the properties of the solder balls but also preventing the solder balls from breaking.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の半導体パッケージの断面図、
第2A図、第2B図はそれぞれ半導体パッケージの蓋と
基板との接合部に入れるスペーサの平面図、正面図、第
3図〜第5図は第2A図のI−1断面を示し各種スペー
サの構成を示す図、第6図は本発明の別の実施例の半導
体パッケージの断面図、第7A図は薄板スペーサの平面
図、第7B図は第7A図の■−■断面図、第8図は本発
明の更に別の実施例の半導体パッケージの断面図、第9
A図は傾斜スペーサの平面図、第9B図は第9A図のm
−m断面図、第10A図は別の傾斜スペーサの平面図、
第10B図は第10A図の■−■断面図、第11図は従
来の半導体パッケージの断面図である。 l・・・半導体素子、2・・・はんだボール、3・り配
線基板、4・・・蓋、5・・・封止ろう材、6・・・固
着ろう材、7 、7 a 、 7 b 、 7 c−ス
ペーサー8,8a−’]バール板、9・・・メタライズ
膜、10・・ろう材、11・・・炭素繊維、12・・・
銅線、13・・・ポリイミド部材、14,14a・・・
薄板スペーサ、15,15a、15b・・・傾斜スペー
サ。
FIG. 1 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention;
Figures 2A and 2B are a plan view and a front view, respectively, of a spacer to be inserted into the joint between the lid and the substrate of a semiconductor package, and Figures 3 to 5 are cross-sections taken along line I-1 in Figure 2A. 6 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention, FIG. 7A is a plan view of a thin plate spacer, FIG. 7B is a cross-sectional view taken along the line ■-■ of FIG. 7A, and FIG. 9 is a sectional view of a semiconductor package according to still another embodiment of the present invention.
Figure A is a plan view of the inclined spacer, Figure 9B is the m of Figure 9A.
-m sectional view, FIG. 10A is a plan view of another inclined spacer,
FIG. 10B is a cross-sectional view taken along the line -■ in FIG. 10A, and FIG. 11 is a cross-sectional view of a conventional semiconductor package. L... Semiconductor element, 2... Solder ball, 3... Wiring board, 4... Lid, 5... Sealing brazing material, 6... Adhering brazing material, 7, 7 a, 7 b , 7 c-spacer 8, 8a-'] Burl plate, 9... Metallized film, 10... Brazing material, 11... Carbon fiber, 12...
Copper wire, 13... Polyimide member, 14, 14a...
Thin plate spacers, 15, 15a, 15b... inclined spacers.

Claims (1)

【特許請求の範囲】 1、内面に半導体を接合した蓋と、その半導体にはんだ
ボールを介して接合された基板とを有し、前記基板の面
周縁部でなるろう付け面と前記蓋との間に形成されたろ
う付け接合部により内部が気密封止された半導体パッケ
ージにおいて、前記ろう付け接合部は、前記ろう付け面
に平行な方向には前記基板及び蓋と熱膨張係数をほぼ等
しくし、かつ前記ろう付け面と垂直な方向には前記はん
だボールと熱膨張係数を等しくするスペーサをその両端
でろう付けして構成したことを特徴とする半導体パッケ
ージ。 2、スペーサを熱膨張係数の小さい板材と、前記はんだ
ボールと熱膨張係数をほぼ等しくするろう付け層を交互
に設けた積層体で構成し、前記ろう付け層の合計厚さを
前記はんだボールの厚さとほぼ等しくしたことを特徴と
する請求項1記載の半導体パッケージ。 3、スペーサを繊維強化複合材料で構成したことを特徴
とする請求項1記載の半導体パッケージ。 4、内面に半導体を接合した蓋と、その半導体にはんだ
ボールを介して接合された基板とを有し、前記基板の面
周縁部でなるろう付け面と前記蓋との間に形成されたろ
う付け接合部により内部が気密封止された半導体パッケ
ージにおいて、前記ろう付け接合部を剛性の小さいスペ
ーサをその両端面でろう付けして構成したことを特徴と
する半導体パッケージ。 5、スペーサをプラスチックで構成したことを特徴とす
る請求項4記載の半導体パッケージ。 6、内面に半導体を接合した蓋と、その半導体にはんだ
ボールを介して接合された基板とを有し、前記基板の面
周縁部でなるろう付け面と前記蓋との間に形成されたろ
う付け接合部により内部が気密封止された半導体パッケ
ージにおいて、前記ろう付け接合部を一縁が前記基板に
近接し他縁が前記蓋に近接する斜め板でなるスペーサと
、そのスペーサの回りを充填するろう材とから構成し、
そのろう材は前記はんだボールと同等の膨張係数を有し
、かつ前記ろう付け接合部の厚さを前記はんだボールの
厚さとほぼ等しくしたことを特徴とする半導体パッケー
ジ。 7、スペーサを熱膨張係数の小さい材料により構成した
ことを特徴とする請求項6記載の半導体パッケージ。 8、請求項1〜7いずれか記載の半導体パッケージを搭
載したコンピュータ。
[Claims] 1. It has a lid with a semiconductor bonded to its inner surface, and a substrate bonded to the semiconductor via a solder ball, and the brazing surface formed by the peripheral edge of the surface of the substrate is connected to the lid. In a semiconductor package whose interior is hermetically sealed by a brazed joint formed therebetween, the brazed joint has a coefficient of thermal expansion substantially equal to that of the substrate and the lid in a direction parallel to the brazing surface; A semiconductor package characterized in that a spacer having a coefficient of thermal expansion equal to that of the solder ball is brazed at both ends in a direction perpendicular to the solder surface. 2. The spacer is composed of a laminate in which plate materials with a small coefficient of thermal expansion and brazing layers having approximately the same coefficient of thermal expansion as the solder balls are alternately provided, and the total thickness of the brazing layers is equal to that of the solder balls. 2. The semiconductor package according to claim 1, wherein the semiconductor package has a thickness substantially equal to the thickness of the semiconductor package. 3. The semiconductor package according to claim 1, wherein the spacer is made of a fiber-reinforced composite material. 4. A lid having a semiconductor bonded to its inner surface and a substrate bonded to the semiconductor via a solder ball, and brazing formed between the brazing surface formed by the peripheral edge of the surface of the substrate and the lid. 1. A semiconductor package whose interior is hermetically sealed by a joint, characterized in that the brazed joint is formed by brazing a spacer with low rigidity on both end faces thereof. 5. The semiconductor package according to claim 4, wherein the spacer is made of plastic. 6. A lid having a semiconductor bonded to its inner surface and a substrate bonded to the semiconductor via a solder ball, and a brazing joint formed between the brazing surface formed by the peripheral edge of the surface of the substrate and the lid. In a semiconductor package whose interior is hermetically sealed by a joint part, the brazing joint part is covered with a spacer made of a diagonal plate with one edge close to the substrate and the other edge close to the lid, and the area around the spacer is filled. Consisting of brazing filler metal,
A semiconductor package characterized in that the brazing material has an expansion coefficient equivalent to that of the solder ball, and the thickness of the brazed joint portion is approximately equal to the thickness of the solder ball. 7. The semiconductor package according to claim 6, wherein the spacer is made of a material having a small coefficient of thermal expansion. 8. A computer equipped with the semiconductor package according to any one of claims 1 to 7.
JP9188690A 1990-04-06 1990-04-06 Semiconductor package Pending JPH03290952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9188690A JPH03290952A (en) 1990-04-06 1990-04-06 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9188690A JPH03290952A (en) 1990-04-06 1990-04-06 Semiconductor package

Publications (1)

Publication Number Publication Date
JPH03290952A true JPH03290952A (en) 1991-12-20

Family

ID=14039046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9188690A Pending JPH03290952A (en) 1990-04-06 1990-04-06 Semiconductor package

Country Status (1)

Country Link
JP (1) JPH03290952A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335433A (en) * 1992-05-27 1993-12-17 Kyocera Corp Package for accommodating semiconductor element
JP2005217003A (en) * 2004-01-28 2005-08-11 Kyocera Corp Package for storing semiconductor element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335433A (en) * 1992-05-27 1993-12-17 Kyocera Corp Package for accommodating semiconductor element
JP2005217003A (en) * 2004-01-28 2005-08-11 Kyocera Corp Package for storing semiconductor element

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