JPH03283095A - Storage device - Google Patents

Abstract

PURPOSE:To prevent erroneous writing from occurring only in a specified area even when malfunction occurs by noise, etc., by dividing a memory and allocating a write permit signal to each divided memory. CONSTITUTION:Address signals X0, X1, Y0, and Y1 are decoded by an X decoder 1 and a Y decoder 2. One line is selected respective from X word lines Xa-Xd and Y word lines Ya-Yb. Then, arbitrary memories 3 and 4 are chosen. Write permit signals WE1 and WE2 to be impressed from an external terminal, one of address signals, the forward and backward signals of the X1, construct a composite gate 6. The output of this composite gate 6 is turned to 'L' only in the two combination of X1='H' and WE2='H', and X1='L' and WE1='H'. By using this output as a write inhibit signal when it is 'H', the time of X1='H', WE2 is the write permit signal and at the time of X1='L', the WE1 is the write permit signal. Thus, even when the malfunction is generated by the noise or the like, the erroneous writing does not occur only in the specific area.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a storage device, and particularly to an electrically rewritable storage device.
It is related to non-volatile memory.

[Conventional technology]

In conventional storage devices, there are the following examples of write-inhibiting methods for protecting data in memory, and in both cases, all memory areas are collectively controlled.

(1) A write permission terminal is provided as an external terminal, and writing permission or prohibition is set by switching this terminal.

(it) It has an instruction to permit or prohibit writing as a command, and is set on the program.

[Problem to be solved by the invention]

In this conventional storage device, writing permission is controlled collectively for all addresses, so if a malfunction occurs due to noise or the like, there is a risk of erroneous writing to all addresses. On the other hand, for example, in electrically rewritable non-volatile memory, part of the system is often stored in the memory (incorrect writing can be a fatal problem, so it is necessary to constantly write this data. There is a strong need to handle this separately from the data that will be processed.

[Means to solve the problem]

In the storage device of the present invention, the memory area is divided into a plurality of areas, and an external control terminal for write permission is assigned to each area.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. Address signals Xo, X1. Y0. Y1 is decoded by an X decoder 1 and a Y decoder 2, one of each of the X word lines Xa to Xd and one of the Y word lines Ya to Yd is selected, and an arbitrary memory is selected. Here, the write permission signal WEWE2 applied from the external terminal and one of the address signals, the positive 2 of Xl.
A composite gate 6 is constructed with the inverted signal. The output of this composite gate 6 is "X1="L" and WE2="H" and "X1="
Only when the two combinations of “L” and WE1="H"
By using this output as a write prohibition signal when it is “H”, WE2 becomes the write permission control signal when X + = “H”, and WE when X1 = “L”. You will work as a.

Here, if the X word lines selected when X + = "H" are Xa and Xb, and the memory area selectable by these word lines is memory a, by setting WE2 = "L", memory a Any writing to is prohibited. Similarly, by setting WE=“L”, writing to memory b is prohibited at all.

Further, FIG. 2 is an example in which the memory area is divided into three parts. Two address signals X 1. The combination of X2 and three write permission signals realizes three-division control of the memory area. In this case, depending on the combination of write permission signals, the write prohibited range is set to O/4, 1/4°, 2/4, 3/4, 4/4.
By increasing the number of write permission signals in this way, it becomes possible to freely set a write-protected area. Note that the X decoder 2 is omitted in FIG.

〔Effect of the invention〕

As explained above, the present invention divides the memory and assigns a write permission signal to each division, thereby making the memory partially write-prohibited, and even if a malfunction occurs due to noise, etc. This has the effect of preventing writing errors from occurring.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment of the invention, and FIG. 2 is a circuit diagram of a second embodiment of the invention. 1...X decoder, 2...X decoder, 3゜4.8, 9.10...divided memory area, 5--inverter 6. . . . Composite gate, 7 . . . Write control circuit, xO, x, , x2.
yo, yl...address signal, Xa, Xb...
・Xg, Xh...X word line, Ya, Yb, Y
c, Yd...X word line, WEW E 2,
W E s...Write control circuit.

Claims (1)

[Claims] A storage device characterized in that a memory area is divided into a plurality of areas, and a control signal from an external terminal for permission to write is assigned to each area.