JPH0326934B2 - - Google Patents
Info
- Publication number
- JPH0326934B2 JPH0326934B2 JP59109208A JP10920884A JPH0326934B2 JP H0326934 B2 JPH0326934 B2 JP H0326934B2 JP 59109208 A JP59109208 A JP 59109208A JP 10920884 A JP10920884 A JP 10920884A JP H0326934 B2 JPH0326934 B2 JP H0326934B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- timing
- circuit
- output
- polarity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005070 sampling Methods 0.000 claims description 16
- 230000005540 biological transmission Effects 0.000 claims description 6
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 6
- 230000010355 oscillation Effects 0.000 claims description 4
- 238000007493 shaping process Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 13
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000001172 regenerating effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59109208A JPS60251742A (ja) | 1984-05-29 | 1984-05-29 | タイミング同期回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59109208A JPS60251742A (ja) | 1984-05-29 | 1984-05-29 | タイミング同期回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60251742A JPS60251742A (ja) | 1985-12-12 |
JPH0326934B2 true JPH0326934B2 (fr) | 1991-04-12 |
Family
ID=14504335
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59109208A Granted JPS60251742A (ja) | 1984-05-29 | 1984-05-29 | タイミング同期回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60251742A (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0693677B2 (ja) * | 1987-01-12 | 1994-11-16 | 富士通株式会社 | 識別タイミング制御回路 |
US4912726A (en) * | 1987-01-12 | 1990-03-27 | Fujitsu Limited | Decision timing control circuit |
JPH0624352B2 (ja) * | 1989-01-18 | 1994-03-30 | 日本電気株式会社 | サンプリング位相誤差検出回路 |
-
1984
- 1984-05-29 JP JP59109208A patent/JPS60251742A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60251742A (ja) | 1985-12-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |