JPH03265162A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH03265162A
JPH03265162A JP2062535A JP6253590A JPH03265162A JP H03265162 A JPH03265162 A JP H03265162A JP 2062535 A JP2062535 A JP 2062535A JP 6253590 A JP6253590 A JP 6253590A JP H03265162 A JPH03265162 A JP H03265162A
Authority
JP
Japan
Prior art keywords
resin
sealing resin
layer
semiconductor device
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2062535A
Other languages
Japanese (ja)
Other versions
JP2892087B2 (en
Inventor
Shinetsu Fujieda
新悦 藤枝
Michiya Azuma
東 道也
Hiroshi Shimozawa
下澤 宏
Akira Yoshizumi
善積 章
Min Tai Kao
カオ・ミン・タイ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2062535A priority Critical patent/JP2892087B2/en
Publication of JPH03265162A publication Critical patent/JPH03265162A/en
Application granted granted Critical
Publication of JP2892087B2 publication Critical patent/JP2892087B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To restrain water from entering inside a package and to improve reliability of humidity resistance by arranging a sealing resin layer of a pair of plate materials which is formed by laminating a sealing resin layer, a metallic layer and an insulating layer one by one in opposition to the side of a semiconductor element and by sealing it by heat bonding. CONSTITUTION:Two sheets of plate material 4 are manufactured, which are formed by laminating an insulating layer 1, a metallic layer 2 and a sealing resin layer 3 one by one. Sealing resin layers 3 of the two sheets of plate material 4 are arranged in opposition each other and a semiconductor element 5 attached to a lead frame 4 is arranged between them. Then, sealing is carried out by heat bonding using upper and lower heating plates.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は樹脂封止型半導体装置に関する。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a resin-sealed semiconductor device.

(従来の技術) 近年、半導体装置の樹脂封止に関する分野においては、
半導体素子の高集積度化に伴って素子上の各種機能単位
の微細化、素子自体の大型化が急速に進んでいる。また
、A S I C(ApplicationSpeci
fic IC)と言われるゲートアレイやスタンダード
セル方式LSIに代表される表面実装型パッケージを実
装する際には、ベーパーフェイズリフロー、赤外線リフ
ロー、半田浸漬などの工程が採用されている。これらの
工程ではパッケージが高温(2工5〜260℃)にさら
される。このため、エポキシ樹脂で封止した樹脂封止型
半導体装置では該樹脂を透過して内部に侵入した微量の
水分が急激に気化し、封止樹脂層にクラックが入る。そ
の結果、前記クラックが外部にまで達すると、耐混信頼
性が保障できないという大きな問題点か生しる。また、
樹脂の膨れが生じて実装できないという現象も発生する
。更に、アルミニウムなどの配線層のパッシベーション
膜として用いられているPSG (リンけい酸ガラス)
や5iN(窒化けい素)にクラックか生したり、Auボ
ンディングワイヤーの断線が生ずるなどの問題が多発す
る。
(Prior art) In recent years, in the field of resin encapsulation of semiconductor devices,
BACKGROUND OF THE INVENTION As semiconductor devices become more highly integrated, various functional units on the device are becoming smaller and the size of the device itself is rapidly increasing. In addition, ASIC (Application Specification)
Processes such as vapor phase reflow, infrared reflow, and solder immersion are used when mounting surface mount packages such as gate arrays called fic ICs and standard cell type LSIs. In these steps, the package is exposed to high temperatures (5 to 260° C. for two steps). For this reason, in a resin-sealed semiconductor device sealed with epoxy resin, a small amount of moisture that penetrates the resin and enters the interior rapidly evaporates, causing cracks in the sealing resin layer. As a result, if the cracks reach the outside, a serious problem arises in that cross-resistance reliability cannot be guaranteed. Also,
There is also a phenomenon in which the resin bulges and cannot be mounted. Furthermore, PSG (phosphosilicate glass) is used as a passivation film for wiring layers such as aluminum.
Problems such as cracks forming in 5iN (silicon nitride) and disconnection of Au bonding wires occur frequently.

これらの対策として、■封止樹脂の内部封入物に対する
応力を小さくし、かつ封止樹脂と素子上のPSGSSi
N、ポリイミド膜及びリードフレームとの密着性を上げ
る;■実装温度に対応した高温強度及び吸湿高温強度を
付与し、かっ吸温量を低減する;などの要求が大型パッ
ケージ用の封止樹脂を中心として高まってきている。
As a countermeasure for these, 1) the stress on the internal encapsulation of the sealing resin is reduced, and the PSGSSi on the sealing resin and the element is reduced;
Demands such as increasing adhesion with N, polyimide films and lead frames; ■ providing high-temperature strength and moisture-absorbing high-temperature strength corresponding to the mounting temperature, and reducing heat absorption; are increasing demands for sealing resins for large packages. It is becoming more and more central.

これらの観点から、封止樹脂としては例えばマレイミド
樹脂系をはじめ、PPS (ポリフェニレンサルファイ
ド)系やPPO(ポリヒドロキシフェニレンエーテル)
系、また液晶ポリマーの実用化が検討されている。更に
、最近では、マレイミド樹脂とエポキシ樹脂とを組合わ
せた樹脂、又はビスマレイミド樹脂と4,4−ジアミノ
ジフェニルメタンとを組合せたアミノビスマレイミド樹
脂が封止樹脂として提案されている。しかしながら、こ
れらの樹脂を用いてトランスファモールド成形を行なう
と、リードフレーム等に対する密着性の改善化が逆に型
離れを阻害するという問題を生じる。
From these viewpoints, examples of sealing resins include maleimide resins, PPS (polyphenylene sulfide), and PPO (polyhydroxyphenylene ether).
The practical application of liquid crystal polymers and liquid crystal polymers is being considered. Furthermore, recently, a resin that is a combination of a maleimide resin and an epoxy resin, or an aminobismaleimide resin that is a combination of a bismaleimide resin and 4,4-diaminodiphenylmethane has been proposed as a sealing resin. However, when transfer molding is performed using these resins, a problem arises in that improved adhesion to lead frames and the like conversely impedes release from the mold.

従って、これら樹脂では、リードフレーム等に対する密
着性の向上と型離れの容易性との相反する特性を満足す
ることができなかった。
Therefore, these resins have not been able to satisfy the contradictory characteristics of improved adhesion to lead frames and the like and ease of release from the mold.

一方、実装する際の問題点をパッケージ構造で改良した
樹脂封止型半導体装置(例えば特開昭60−20884
7号)が提案されている。この半導体装置は、ダイパッ
ドの下側のモールド樹脂(封止樹脂)部に円柱又は多角
形状の穴を設けて極度に肉厚の薄い部分又はモールド樹
脂がない部分を形成し、加熱に際してモールド樹脂内部
の水分の蒸発によって発生するガスを前述した極度に薄
くした部分などから逃散させる構造になっている。また
、トランスファモールド成形法からパッケージ表面に金
属性被覆層を形成することによって、外部にまで達する
クラックの発生を防止して耐湿信頼性の向上を図った樹
脂封止型半導体装置も考えられる。しかしながら、いず
れの樹脂封止型半導体装置も生産性及び耐湿信頼性の点
から十分に満足するものではなかった。
On the other hand, resin-sealed semiconductor devices (for example, Japanese Patent Laid-Open No. 60-20884
No. 7) has been proposed. In this semiconductor device, a cylindrical or polygonal hole is provided in the mold resin (sealing resin) below the die pad to form an extremely thin part or a part without mold resin, and when heated, the inside of the mold resin is heated. The structure allows the gas generated by the evaporation of water to escape from the extremely thin portions mentioned above. Another possibility is a resin-sealed semiconductor device in which a metallic coating layer is formed on the package surface using a transfer molding method to prevent cracks from reaching the outside and improve moisture resistance reliability. However, none of the resin-sealed semiconductor devices was fully satisfactory in terms of productivity and moisture resistance reliability.

(発明が解決しようとする課題) 本発明は、前記課題を解決するためになされたもので、
製造が容易で、パッケージ内部への水分の侵入を抑えて
実装時の加熱に際しての樹脂のクラック発生を防止した
耐湿信頼性が良好な樹脂封止型半導体装置を提供しよう
とするものである。
(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned problems.
The present invention aims to provide a resin-sealed semiconductor device that is easy to manufacture, suppresses the intrusion of moisture into the package, prevents cracks in the resin during heating during mounting, and has good moisture resistance reliability.

[発明の構成コ (課題を解決するための手段) 本発明は、封止樹脂層、金属層、及び絶縁層をこの順に
積層したプレート材料を該封止樹脂層が半導体素子側に
対向するように配置し、加熱圧着して封止したことを特
徴とする樹脂封止型半導体装置である。
[Structure of the Invention (Means for Solving the Problems)] The present invention provides a plate material in which a sealing resin layer, a metal layer, and an insulating layer are laminated in this order so that the sealing resin layer faces the semiconductor element side. This is a resin-sealed semiconductor device, characterized in that the semiconductor device is placed in a resin-sealed semiconductor device and sealed by heat and pressure bonding.

前記封止樹脂層を形成する封止樹脂としては、エポキシ
系樹脂、フェノール系樹脂、マレイミド系封止樹脂、シ
リコーン系封止樹脂などが挙げられ、更にその他の熱可
塑性樹脂、エンジニアリングプラッスチックなども挙げ
られる。これらの中でも耐湿信頼性をより向上させる観
点から、半導体素子及び金属との密着性が高く、かつ樹
脂自体の吸湿量が少ないものが望ましい。かかる封止樹
脂層の厚さは、パッケージの厚みに応じて適宜に設定さ
れる。但し、前記封止樹脂層の厚さの下限値については
加熱圧着工程において前記金属層と半導体素子のボンデ
ィングワイヤー等との接触を防止できる厚さにする必要
がある。
Examples of the sealing resin forming the sealing resin layer include epoxy resins, phenol resins, maleimide sealing resins, silicone sealing resins, and other thermoplastic resins and engineering plastics. It will be done. Among these, from the viewpoint of further improving moisture resistance reliability, it is desirable that the resin has high adhesion to semiconductor elements and metals, and the resin itself has a small amount of moisture absorption. The thickness of the sealing resin layer is appropriately set depending on the thickness of the package. However, the lower limit of the thickness of the sealing resin layer needs to be set to a thickness that can prevent contact between the metal layer and the bonding wire of the semiconductor element during the heat-pressing process.

前記金属層を形成する金属としては、例えば鉄、ニッケ
ル、銅、金、銀、アルミニウム、スズ、ケイ素、ステン
レス、鉛、及びこれらの合金などが挙げられる。これら
の中でも薄型に加工でき、かつ軽量であるものが望まし
い。かかる金属層の厚さは、1000μM以下にするこ
とが望ましい。
Examples of the metal forming the metal layer include iron, nickel, copper, gold, silver, aluminum, tin, silicon, stainless steel, lead, and alloys thereof. Among these, those that can be processed into a thin shape and are lightweight are desirable. The thickness of such a metal layer is desirably 1000 μM or less.

前記絶縁層としては、金属酸化物層、ポリイミド膜など
が挙げられる。前記金属酸化物層は前記金属層の表面を
酸化して形成した金属酸化膜であってもよい。かかる絶
縁層は、十分な絶縁性を確保する観点から、体積、抵抗
率が1.OX 108Ω・cm以上であるものが望まし
い。また、その厚さは、5μm以下にすることが望まし
い。なお、前記絶縁層は前記金属層の両面に酸化膜等の
形態で設けてもよい。
Examples of the insulating layer include a metal oxide layer and a polyimide film. The metal oxide layer may be a metal oxide film formed by oxidizing the surface of the metal layer. Such an insulating layer has a volume and a resistivity of 1.0 from the viewpoint of ensuring sufficient insulation. It is desirable that the resistance is OX 108Ω·cm or more. Further, it is desirable that the thickness thereof be 5 μm or less. Note that the insulating layer may be provided in the form of an oxide film or the like on both surfaces of the metal layer.

前記プレート材料は、例えば金属層と絶縁層とを予め積
層した後、該金属層側に封止樹脂層を積層して作製する
ことができる。前記封止樹脂層を積層する方法としては
、金属層表面に封止樹脂をコーティングする方法、金属
層表面に封止樹脂を粉体塗装する方法、金属層表面に封
止樹脂の圧縮成形体を熱融着する方法などが挙げられる
The plate material can be produced by, for example, laminating a metal layer and an insulating layer in advance and then laminating a sealing resin layer on the metal layer side. The method of laminating the sealing resin layer includes a method of coating the surface of the metal layer with the sealing resin, a method of powder coating the surface of the metal layer with the sealing resin, and a method of applying a compression molded body of the sealing resin to the surface of the metal layer. Examples include a method of heat fusion.

本発明に係る樹脂封止型半導体装置は、一つの前記プレ
ート材料で半導体素子を片側から封止した形態と、二つ
の前記プレート材料で半導体素子を両側から封止した形
態とがある。これらの形態は前記半導体素子の取付は状
態に応じて選択される。例えば、半導体素子がリードフ
レームとボンディングされた状態では、これら部材を二
つのプレート材料で挟む形態が採用される。半導体素子
がフィルムキャリアとボンディングされた状態では、こ
れら部材の片側(素子のフィルムキャリアとのボンディ
ング面)にプレート材料を配置するか、これら部材を二
つのプレート材料で挟む形態が採用される。半導体素子
が回路基板に実装された状態では、素子側にプレート材
料を配置する形態か採用される。このような樹脂封止型
半導体装置の製造方法を以下に (1)〜(4)の方法
として具体的に例示する。
The resin-sealed semiconductor device according to the present invention has a form in which a semiconductor element is sealed from one side with one plate material, and a form in which a semiconductor element is sealed from both sides with two plate materials. These forms are selected depending on the mounting state of the semiconductor element. For example, when a semiconductor element is bonded to a lead frame, these members are sandwiched between two plate materials. When a semiconductor element is bonded to a film carrier, a plate material is placed on one side of these members (the bonding surface of the element with the film carrier), or these members are sandwiched between two plate materials. When a semiconductor element is mounted on a circuit board, a plate material is placed on the side of the element. Methods for manufacturing such resin-sealed semiconductor devices will be specifically exemplified below as methods (1) to (4).

(1)第1図(a)に示すように、絶縁層1、金属層2
、及び封止樹脂層3をこの順に積層した二つのプレート
材料4を該封止樹脂層3が対向するように配置し、これ
らプレート材料4の間に半導体素子5を配置する。前記
半導体素子5は、リードフレームのグイバット6上に載
置され、かつ上面の電極がリード7にワイヤー8でボン
ディングされている。次いで、二つのプレート材料4の
封止樹脂層3をプレート加熱、又は赤外線加熱などによ
り加熱して軟化溶融状態にし、前記半導体素子5を二つ
のプレート材料4て挟み込んで圧着する。このときの封
止樹脂層3の軟化溶融状態は、通常、封止樹脂がプレー
ト材料から滴下せず、しかも圧着したときにボンディン
グワイヤーなどが変形しない程度の範囲内に調整する。
(1) As shown in FIG. 1(a), an insulating layer 1, a metal layer 2
, and a sealing resin layer 3 are arranged in this order so that the sealing resin layers 3 face each other, and a semiconductor element 5 is arranged between these plate materials 4. The semiconductor element 5 is placed on a lead frame 6, and the electrodes on the upper surface are bonded to the leads 7 with wires 8. Next, the sealing resin layers 3 of the two plate materials 4 are heated by plate heating or infrared heating to soften and melt, and the semiconductor element 5 is sandwiched between the two plate materials 4 and pressed together. The softened and molten state of the sealing resin layer 3 at this time is usually adjusted within a range such that the sealing resin does not drip from the plate material and the bonding wire etc. do not deform when crimped.

こうした工程により、第1図(b)に示すように、前記
半導体素子5、ダイパッド6及びワイヤー8が封止樹脂
層3内に封止され、その外側に金属層2及び絶縁層1が
漸次配置された樹脂封止型半導体装置を得る。
Through these steps, as shown in FIG. 1(b), the semiconductor element 5, die pad 6, and wire 8 are sealed in the sealing resin layer 3, and the metal layer 2 and the insulating layer 1 are gradually disposed outside of the sealing resin layer 3. A resin-sealed semiconductor device is obtained.

(2)第2図(a)に示すように、バンプ9てフィルム
キャリヤ10とボンディングされたTAB(Tape 
Automated Bonding)タイプの半導体
素子5を用いた以外は前記(1)の方法と同様に行なう
(2) As shown in FIG. 2(a), the TAB (Tape) bonded to the film carrier 10 through the bump 9
The process is carried out in the same manner as the method (1) above, except that the semiconductor element 5 of the Automated Bonding (Automated Bonding) type is used.

こうした工程により、第2図(b)に示すように、半導
体素子5及びバンプ9が封止樹脂層3内に封止され、そ
の外側に金属層2及び絶縁層1が漸次配置された樹脂封
止型半導体装置を得る。
Through these steps, as shown in FIG. 2(b), the semiconductor element 5 and the bumps 9 are sealed in the sealing resin layer 3, and the resin sealing layer with the metal layer 2 and the insulating layer 1 gradually arranged on the outside thereof. A stop type semiconductor device is obtained.

(3〉第3図(a)に示すように、絶縁層1、金属層2
、及び封止樹脂層3をこの順に積層したプレート材料4
を、該封止樹脂層3がTABタイプの半導体素子5のボ
ンディング側に対向するように配置する。次いで、プレ
ート材料4の封止樹脂層3を加熱して軟化溶融状態にし
、圧着する。こうした工程により、第3図(b)に示す
ように、半導体素子5のボンディング面及び側面、並び
にバンプ9が封止樹脂層3に封止され、半導体素子5の
ボンディング面側に封止樹脂層3を介して金属層2及び
絶縁層(か漸次配置された樹脂封止型半導体装置を得る
(3> As shown in Fig. 3(a), insulating layer 1, metal layer 2
, and a plate material 4 in which the sealing resin layer 3 is laminated in this order.
are arranged so that the sealing resin layer 3 faces the bonding side of the TAB type semiconductor element 5. Next, the sealing resin layer 3 of the plate material 4 is heated to a softened and molten state, and then press-bonded. Through these steps, as shown in FIG. 3(b), the bonding surface and side surfaces of the semiconductor element 5, as well as the bumps 9, are sealed in the sealing resin layer 3, and a sealing resin layer is formed on the bonding surface side of the semiconductor element 5. A resin-sealed semiconductor device is obtained in which the metal layer 2 and the insulating layer (are gradually disposed through the metal layer 2 and the insulating layer 3 are disposed gradually).

(4)第4図(a)に示すように、絶縁層11金属層2
、及び封止樹脂層3をこの順に積層したプレート材料4
を該封止樹脂層3が半導体素子5上面側に対向するよう
に配置する。前記半導体素子5は、基板ll上に実装さ
れ、かつ上面の電極が基板11上の配線12にワイヤー
8でボンディングされている。次いで、プレート材料4
の封止樹脂層3を加熱して軟化溶融状態にし、圧着する
。こうした工程により、第4図(b)に示すように、半
導体素子5、ワイヤー8、及び配線12が基板11上で
封止樹脂層3に封止され、半導体素子5上面側に封止樹
脂層3を介して金属層2及び絶縁層1が漸次配置された
樹脂封止型半導体装置を得る。
(4) As shown in FIG. 4(a), the insulating layer 11 metal layer 2
, and a plate material 4 in which the sealing resin layer 3 is laminated in this order.
are arranged so that the sealing resin layer 3 faces the upper surface side of the semiconductor element 5. The semiconductor element 5 is mounted on the substrate 11, and the electrode on the upper surface is bonded to the wiring 12 on the substrate 11 with a wire 8. Next, plate material 4
The sealing resin layer 3 is heated to a softened and molten state, and then press-bonded. Through these steps, as shown in FIG. 4(b), the semiconductor element 5, the wire 8, and the wiring 12 are sealed in the sealing resin layer 3 on the substrate 11, and the sealing resin layer is formed on the upper surface side of the semiconductor element 5. A resin-sealed semiconductor device is obtained in which the metal layer 2 and the insulating layer 1 are gradually disposed through the metal layer 2 and the insulating layer 1.

(作用) 本発明によれば、絶縁層、金属層、及び封止樹脂層をこ
の順に積層したプレート材料を該封止樹脂層側から半導
体素子に加熱圧着して封止した構成になることによって
、パッケージ内部への水分の侵入を前記金属層により抑
制できる。その結果、実装時における加熱に際して微量
な残留水分の急激な気化による封止樹脂層のクラック発
生を防止でき、耐湿信頼性の優れた樹脂封止型半導体装
置を得ることができる。また、前記金属層は前記絶縁層
で被覆されているためピンなどの接触による誤動作を防
止できる。
(Function) According to the present invention, a plate material in which an insulating layer, a metal layer, and a sealing resin layer are laminated in this order is sealed by heat-pressing and bonding the semiconductor element from the sealing resin layer side. The metal layer can prevent moisture from entering the package. As a result, it is possible to prevent the generation of cracks in the sealing resin layer due to rapid vaporization of minute amounts of residual moisture during heating during mounting, and it is possible to obtain a resin-sealed semiconductor device with excellent moisture resistance and reliability. Furthermore, since the metal layer is covered with the insulating layer, malfunctions due to contact with pins or the like can be prevented.

更に、前記プレート材料を用いることによって、従来の
トランスファモールド成形法のような封止樹脂の型離れ
を考慮する必要がないため、封止樹脂として半導体素子
やボンディングワイヤーとの密着性に優れたものを選択
することができる。その結果、かかる点からも耐湿信頼
性を向上できる。
Furthermore, by using the above-mentioned plate material, there is no need to consider separation of the sealing resin from the mold as in the conventional transfer molding method, so the sealing resin has excellent adhesion to semiconductor elements and bonding wires. can be selected. As a result, moisture resistance reliability can be improved from this point as well.

また、トランスファモールド成形法と比べて短時間成形
が可能であるため容易に製造することができる。
Furthermore, since molding can be performed in a shorter time than with transfer molding, manufacturing is easier.

(実施例) 以下、本発明の実施例を詳細に説明する。(Example) Examples of the present invention will be described in detail below.

実施例1 ダイパッドサイズが15.5+n+n角であって板厚が
150μかの4.270イ製リードフレームに、25μ
m径のボンディングワイヤーでボンディングされた半導
体素子(チップサイズ15mm角、パッシベーション膜
二表面ポリイミド膜)を作製した。また、アルマイト処
理により表面が酸化層(絶縁層)で覆われた板厚が40
0μ口のアルミプレート(金属層)の片面に下記第1表
に示す物性のエポキシ系樹脂組成物を加熱コーティング
して封止樹脂層を形成することにより二枚のプレート材
料を作製した。
Example 1 A lead frame made of 4.270 mm with a die pad size of 15.5+n+n square and a plate thickness of 150μ is 25μ
A semiconductor element (chip size: 15 mm square, passivation film, polyimide film on two surfaces) bonded with m-diameter bonding wire was produced. In addition, the thickness of the plate whose surface is covered with an oxide layer (insulating layer) due to alumite treatment is 40 mm.
Two plate materials were prepared by heating and coating one side of a 0 μm aluminum plate (metal layer) with an epoxy resin composition having the physical properties shown in Table 1 below to form a sealing resin layer.

次いで、前記構成の二枚のプレート材料を前述した第1
図(a)に示すようにそれら封止樹脂層3が互いに対向
するように配置し、これらプレート材料4間にリードフ
レームに取付けられた半導体素子5を配置した。次いで
、図示しない上下加熱プレートにより温度170℃、圧
力5kg/cm2の条件下で、加熱圧着して封止した後
、175℃で4時間アフターキュアーし、封止樹脂を十
分に硬化して第1図(b)に示すパッケージ形状が32
1×32+n+nX 3.6mmでQFPI84ビンの
樹脂封止型半導体装置を製造した。
Next, the two plate materials having the above-mentioned configuration are
As shown in Figure (a), these sealing resin layers 3 were arranged so as to face each other, and a semiconductor element 5 attached to a lead frame was arranged between these plate materials 4. Next, the sealing was carried out by heating and pressure bonding using upper and lower heating plates (not shown) at a temperature of 170°C and a pressure of 5 kg/cm2, and after-curing was performed at 175°C for 4 hours to sufficiently harden the sealing resin. The package shape shown in figure (b) is 32
A resin-sealed semiconductor device with a size of 1×32+n+n×3.6 mm and 84 QFPI bottles was manufactured.

第    1    表 実施例2 板厚が400μ−のアルミプレート(金属層)の一方の
面に絶縁層としてポリイミド樹脂を5μmの厚さでコー
ティングし、前記アルミプレートの他方の面に実施例1
と同じエポキシ系樹脂組成物を加熱コーティングして封
止樹脂層を形成することにより二枚のプレート材料を作
製した。これ以外は実施例1と同様にして第1図(b)
に示す樹脂封止型半導体装置を製造した。
Table 1 Example 2 One side of an aluminum plate (metal layer) with a thickness of 400 μm was coated with polyimide resin to a thickness of 5 μm as an insulating layer, and the other side of the aluminum plate was coated with Example 1.
Two plate materials were prepared by heating and coating the same epoxy resin composition as above to form a sealing resin layer. Other than this, the procedure was the same as in Example 1, as shown in FIG. 1(b).
A resin-sealed semiconductor device shown in Figure 1 was manufactured.

実施例3 実施例1のプレート材料の封止樹脂層を薄くしてパッケ
ージ形状を32+nmX 32m1X 2mn+とした
以外は実施例1と同様にして第1図(b)に示す樹脂封
止型半導体装置を製造した。
Example 3 A resin-sealed semiconductor device shown in FIG. 1(b) was produced in the same manner as in Example 1, except that the sealing resin layer of the plate material of Example 1 was made thinner and the package shape was changed to 32+ nm x 32 m1 x 2 mn+. Manufactured.

実施例4 実施例1のプレート材料の封止樹脂層を薄くしてパッケ
ージ形状を32mmX 32mmX 1mmとした以外
は実施例1と同様にして第1図(b)に示す樹脂封止型
半導体装置を製造した。
Example 4 A resin-sealed semiconductor device shown in FIG. 1(b) was produced in the same manner as in Example 1 except that the sealing resin layer of the plate material of Example 1 was made thinner and the package shape was 32 mm x 32 mm x 1 mm. Manufactured.

実施例5 板厚が200μ0の銅プレート(金属層)の一方の面に
絶縁層としてポリイミド樹脂を5μmの厚さでコーティ
ングし、前記銅プレートの他方の面に実施例1と同じエ
ポキシ系樹脂組成物を加熱コーティングして封止樹脂層
を形成することにより二枚のプレート材料を作製した。
Example 5 One side of a copper plate (metal layer) with a thickness of 200μ0 was coated with polyimide resin to a thickness of 5μm as an insulating layer, and the other side of the copper plate was coated with the same epoxy resin composition as in Example 1. Two plate materials were prepared by heat coating the material to form a sealing resin layer.

これ以外は実施例1と同様にして第1図(b)に示す樹
脂封止型半導体装置を製造した。
Except for this, the resin-sealed semiconductor device shown in FIG. 1(b) was manufactured in the same manner as in Example 1.

実施例6 板厚が150μmのステンレスプレート(金属層)の一
方の面に絶縁層としてポリイミド樹脂を5μmの厚さで
コーティングし、前記、ステンレスプレートの他方の面
に実施例1と同じエポキシ系樹脂組成物を加熱コーティ
ングして封止樹脂層を形成することにより二枚のプレー
ト材料を作製した。
Example 6 One surface of a stainless steel plate (metal layer) with a thickness of 150 μm was coated with polyimide resin to a thickness of 5 μm as an insulating layer, and the same epoxy resin as in Example 1 was coated on the other surface of the stainless steel plate. Two plate materials were prepared by heat coating the composition to form a sealing resin layer.

これ以外は実施例1と同様にして第1図(b)に示す樹
脂封止型半導体装置を製造した。
Except for this, the resin-sealed semiconductor device shown in FIG. 1(b) was manufactured in the same manner as in Example 1.

比較例1 実施f!IJ1で用いたエポキシ系樹脂組成物に内部離
型剤であるカルナバワックスを0.4重量部添加したも
のを封止樹脂として用い、金型温度が170℃のトラン
スファモールド成形法により実施例1と同じ半導体素子
を封止樹脂層内に封止してパッケージ形状が32mmX
 32m+IIX 3.6+n+nてQFPIli4ビ
ンの樹脂封止型半導体装置を製造した。
Comparative Example 1 Implementation f! Using the epoxy resin composition used in IJ1 to which 0.4 parts by weight of carnauba wax, which is an internal mold release agent, was added as a sealing resin, the same molding as that of Example 1 was performed using a transfer molding method at a mold temperature of 170°C. The same semiconductor element is sealed in a sealing resin layer and the package size is 32mmX.
A resin-sealed semiconductor device of 4 bottles of QFPIli was manufactured using 32m+IIX 3.6+n+n.

比較例2 比較例1の封止樹脂層を薄くしてパッケージ形状を32
mmX 32+nmX 2mmとした以外は比較例1と
同様にして樹脂封止型半導体装置を製造した。
Comparative Example 2 The sealing resin layer of Comparative Example 1 was made thinner, and the package shape was changed to 32 mm.
A resin-sealed semiconductor device was manufactured in the same manner as in Comparative Example 1 except that the dimensions were mmX 32+nmX 2mm.

比較例3 比較例1の封止樹脂層を薄くしてパッケージ形状を32
maX 32m1X lff1mとした以外は比較例1
と同様にして樹脂封止型半導体装置を製造した。
Comparative Example 3 The sealing resin layer of Comparative Example 1 was made thinner and the package shape was changed to 32 mm.
Comparative example 1 except that maX 32m1X lff1m
A resin-sealed semiconductor device was manufactured in the same manner as above.

実施例1〜6及び比較例1〜3の樹脂封止型半導体装置
の製造時の封止工程におけるパッケージ成形時間を下記
第2表に示す。
Table 2 below shows the package molding times in the sealing process during manufacturing of the resin-sealed semiconductor devices of Examples 1 to 6 and Comparative Examples 1 to 3.

実施例1〜6及び比較例1〜3の樹脂封止型半導体装置
について、封止樹脂の吸水率、半導体素子のパッシベー
ション膜であるポリイミド膜との密着性、及びリードフ
レームとの密着性を調べた。
Regarding the resin-sealed semiconductor devices of Examples 1 to 6 and Comparative Examples 1 to 3, the water absorption rate of the sealing resin, the adhesion to the polyimide film that is the passivation film of the semiconductor element, and the adhesion to the lead frame were investigated. Ta.

また、温度85℃、相対湿度85%で200時間吸湿処
理した後、215℃でvPS処理(ペーパーフェイズリ
フロー処理)を行ない、VPS処理直後の外部に達する
クラック発生を観察して不良品の発生を調べた。更に、
温度121℃で2気圧のプレッシャークツカー内で耐湿
信頼性テストを行ない不良品の発生を調べた。これらの
結果を下記第2表に示す。
In addition, after 200 hours of moisture absorption treatment at a temperature of 85℃ and relative humidity of 85%, vPS treatment (paper phase reflow treatment) was performed at 215℃, and we observed the occurrence of cracks that reached the outside immediately after VPS treatment to check for the occurrence of defective products. Examined. Furthermore,
A moisture resistance reliability test was conducted in a pressure cooker at a temperature of 121°C and a pressure of 2 atm to investigate the occurrence of defective products. These results are shown in Table 2 below.

第2表から明らかなように実施例1〜6の樹脂封止型半
導体装置は金属層を有するため水分の侵入が抑えられ、
比較例1〜3の樹脂封止型半導体装置と比べて封止樹脂
の吸水率が小さいのがわかる。また、実施例1〜6の樹
脂封止型半導体装置は、型層れのよい封止樹脂を用いる
必要がないので半導体素子及びボンディングワイヤーと
の密着性に優れた封止樹脂が用いることができる。その
結果、パッケージ内部の水都の急激な気化によるvPS
処理後の外部に達するクラックの発生が少なく、耐湿信
頼性にも優れることが確認できる。
As is clear from Table 2, since the resin-sealed semiconductor devices of Examples 1 to 6 have a metal layer, moisture infiltration is suppressed;
It can be seen that the water absorption rate of the sealing resin is lower than that of the resin-sealed semiconductor devices of Comparative Examples 1 to 3. Further, in the resin-sealed semiconductor devices of Examples 1 to 6, there is no need to use a sealing resin with good mold layering, so a sealing resin with excellent adhesion to the semiconductor element and bonding wire can be used. . As a result, vPS due to rapid vaporization of water city inside the package
It can be confirmed that there are few cracks that reach the outside after treatment, and that the product has excellent moisture resistance and reliability.

更に、実施例1〜6の樹脂封止型半導体装置は、トラン
スファモールド成形法よりも短い成形時間で容易に製造
することができるのがわかる。
Furthermore, it can be seen that the resin-sealed semiconductor devices of Examples 1 to 6 can be easily manufactured in a shorter molding time than the transfer molding method.

[発明の効果] 以上詳述した如く、本発明によればパッケージ内部への
水分の侵入を抑えて実装時の加熱に際しての樹脂のクラ
ック発生が防止されて耐湿信頼性に優れ、しかも製造が
容易で、今後の半導体素子の大型化や薄型化指向に十分
に対応可能な樹脂封止型半導体装置を提供することがで
きる。
[Effects of the Invention] As detailed above, according to the present invention, moisture intrusion into the inside of the package is suppressed, cracks in the resin are prevented during heating during mounting, and the package has excellent moisture resistance and reliability, and is easy to manufacture. Therefore, it is possible to provide a resin-sealed semiconductor device that can fully respond to future trends toward larger and thinner semiconductor elements.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、(b)は本発明に係る樹脂封止型半導体
装置の製造工程を示す断面図、第2図(a)、(b)は
本発明に係る樹脂封止型半導体装置の他の製造工程を示
す断面図、第3図(a)。 (b)は本発明に係る樹脂封止型半導体装置の他の製造
工程を示す断面図、第4図(a)、(b)は本発明に係
る樹脂封止型半導体装置の他の製造工程を示す断面図で
ある。 1・・・絶縁層、2・・・金属層、3・・・封止樹脂層
、4・・・プレート材料、5・・・半導体素子、6・・
・ダイパッド、7・・・リード、8・・・ワイヤー  
9・・・バンブ、10・・・フィルムキャリヤ、11・
・・基板、12・・・配線。
FIGS. 1(a) and (b) are cross-sectional views showing the manufacturing process of a resin-sealed semiconductor device according to the present invention, and FIGS. 2(a) and (b) are cross-sectional views of the resin-sealed semiconductor device according to the present invention. FIG. 3(a) is a sectional view showing another manufacturing process. (b) is a sectional view showing another manufacturing process of the resin-sealed semiconductor device according to the present invention, and FIGS. 4(a) and (b) are other manufacturing steps of the resin-sealed semiconductor device according to the present invention. FIG. DESCRIPTION OF SYMBOLS 1... Insulating layer, 2... Metal layer, 3... Sealing resin layer, 4... Plate material, 5... Semiconductor element, 6...
・Die pad, 7...Lead, 8...Wire
9... Bamboo, 10... Film carrier, 11.
... Board, 12... Wiring.

Claims (1)

【特許請求の範囲】[Claims] 封止樹脂層、金属層、及び絶縁層をこの順に積層したプ
レート材料を該封止樹脂層が半導体素子側に対向するよ
うに配置し、加熱圧着して封止したことを特徴とする樹
脂封止型半導体装置。
A resin seal characterized in that a plate material in which a sealing resin layer, a metal layer, and an insulating layer are laminated in this order is arranged so that the sealing resin layer faces the semiconductor element side, and sealed by heat-pressing. Stop type semiconductor device.
JP2062535A 1990-03-15 1990-03-15 Resin-sealed semiconductor device and method of manufacturing the same Expired - Fee Related JP2892087B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2062535A JP2892087B2 (en) 1990-03-15 1990-03-15 Resin-sealed semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2062535A JP2892087B2 (en) 1990-03-15 1990-03-15 Resin-sealed semiconductor device and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH03265162A true JPH03265162A (en) 1991-11-26
JP2892087B2 JP2892087B2 (en) 1999-05-17

Family

ID=13203003

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2892087B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0685114A (en) * 1992-09-01 1994-03-25 Toshiba Corp Resin seal semiconductor device and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0685114A (en) * 1992-09-01 1994-03-25 Toshiba Corp Resin seal semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
JP2892087B2 (en) 1999-05-17

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