JPH0321089B2 - - Google Patents

Info

Publication number
JPH0321089B2
JPH0321089B2 JP61050237A JP5023786A JPH0321089B2 JP H0321089 B2 JPH0321089 B2 JP H0321089B2 JP 61050237 A JP61050237 A JP 61050237A JP 5023786 A JP5023786 A JP 5023786A JP H0321089 B2 JPH0321089 B2 JP H0321089B2
Authority
JP
Japan
Prior art keywords
strap
straps
hybrid
impedance
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61050237A
Other languages
English (en)
Other versions
JPS61222246A (ja
Inventor
Aauin Gureruman Eichi
Daburyu Rakuso Kaaru
Jei Reegan Jon
Ei Roorando Reonarudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of JPS61222246A publication Critical patent/JPS61222246A/ja
Publication of JPH0321089B2 publication Critical patent/JPH0321089B2/ja
Granted legal-status Critical Current

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    • H01ELECTRIC ELEMENTS
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    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/41Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Waveguide Connection Structure (AREA)
  • Wire Bonding (AREA)
  • Waveguides (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、高周波数において誘導性リアクタン
スのない共面導波路により、2個の半導体素子を
互いに接続したり、半導体素子を受動回路に接続
する装置に関する。
〔従来の技術及び問題点〕
一般にワイヤ・ボンデイングによりマイクロプ
ロセツサの如き小形集積回路(IC)素子をハイ
ブリツド集積回路の如き他の大形半導体素子に接
続している。このワイヤ・ボンデイング技法に
は、直径が非常に小さいワイヤを小形ICチツプ
の接触点又は接合パツドに融合させる特殊装置を
利用する。一方の半導体素子及び他方の半導体素
子を物理的に相互接続するこの方法は、これら素
子間の信号周波数の上限が10MHz未満の場合には
好適である。しかし、100MHz付近の周波数では、
ボンド・ワイヤは、接続路内に誘導性成分を含む
インダクタとして作用し、信号レベルを減衰させ
る。この減衰作用は、入力周波数波のある部分が
ワイヤ・ボンド接続部分から信号源に反射した際
に生じる減算効果の形式をとる。GHz範囲の周
波数では、ワイヤ・ボンドは、ほぼ純粋のインダ
クタンスとなり、入力信号を大幅に阻止する。ま
た、10〜30GHzの範囲では、入力信号を完全に減
衰させる。
ハイブリツドICチツプ、即ちセラミツク基板
を備えた比較的大形のチツプでは、チツプ上に設
けられた伝送線を介して高周波のRF信号を伝送
する。かかる伝送線は、グプタ,ガーグ及びバー
ルによる教科書「マイクロストリツプ・ライン及
びスロツトライン(Microstrip Lines and
Slotlines)」(1979年にアーテク・ハウス・イン
コーポレイテツドより出版)に一般的に記載され
ている。かかる回路上の伝送線は、1対の接地板
導体により反対側上で側面を接する信号伝達導体
を有する共面(coplanar)導波路の形式になつ
ている。すべての導体は、ほぼ平行に他方に延
び、共面である。ハイブリツドICチツプの伝送
線及び小形IC間のインタフエースにおいて、上
述のボンド・ワイヤ接続を行なうことことを通常
ダイという。ハイブリツドICの伝送線は、GHz
範囲の周波数を十分に扱えるが、ICダイをハイ
ブリツドIC伝送線に接続しようとすると、上述
した誘導性の問題に直面する。
したがつて本発明の目的の1つは、信号減衰が
僅かしかないか又は全くなく、非常に高周波の信
号を扱える2個の半導体素子間の電気接続装置の
提供にある。
本発明の他の目的は、従来の圧力ボンデイング
技法を用いて各半導体素子にボンドされた2個の
半導体素子間の共面導波路接続リングである電気
接続装置の提供にある。
本発明の更に他の目的は、従来のワイヤ・ボン
デイング技法により生じる誘導性リアクタンスの
問題を解決した。2個の半導体素子間の接続リン
グである電気接続装置の提供にある。
本発明の他の目的は、ハイブリツドICチツプ
及びICダイ間の共面導波路伝送リンクである電
気接続装置の提供にあり、この伝送リンクのイン
ピーダンスはハイブリツドICのインピーダンス
に一致している。
〔問題点を解決するための手段及び作用〕 本発明は、伝送線の所定インピーダンスを基本
的に維持する構成で、ハイブリツドICの伝送線
を持続することにより、ワイヤ・ボンデイング接
続により生じる誘導性の問題を解決する。よつ
て、媒体から媒体へのインピーダンを一定に維持
し、ハイブリツドIC及び小形ICダイ間の接続に
おける誘導負荷による信号減衰をなくす。
本発明によれば、絶縁基板により支持された3
個の薄い金属ストラツプを、ハイブリツドIC及
びICダイ上の電気接触点に圧力ボンドする。同
じ水平面に位置する3個のストラツプは、ハイブ
リツドICの連続した伝送線を形成する。中央ス
トラツプは信号伝達導体であり、この中央ストラ
ツプの各側のストラツプは接地板を形成する。誘
導体物質のプレーナ・シートであるポリイミド基
板上にこれらストラツプを形成する。更に、これ
らストラツプをポリイミド薄板内に埋め込むの
で、各ストラツプ間の間隙幅には実質的に誘導体
物質がつまつている。
外側のストラツプが接地板として作用するよう
に接地ストラツプの各幅が設定される。代表的に
は、信号伝達ストラツプの幅が約2.5ミル(=
63.5μm)であり、外側ストラツプの幅が6ミリ
(=152.4μm)である。これら幅により、マイク
ロストラツプ導波路の全体的なインピーダンスが
計算可能である。このインピーダンスは、インダ
クタンスと容量の比の平方根に等しい。インピー
ダンスが既知ならば、信号伝達中央ラインと2個
の隣接する側面側の接地板ライン間の間隙を調整
することにより、マイクロストラツプ導波路の容
量を調整できる。この間隙は、誘電体物質で実質
的に埋まつているので、これらラインは入力信号
に容量性リアクタンスを与える。このリアクタン
スは、調整用装置により達成可能な許容差内で間
隙の寸法を決めることにより調整できる。
2個の半導体素子間の実際の物理的接続は、ま
ずマイクロストラツプ接続を含むポリイミド基板
を必要な長さ及び幅に切断し、マイクロストラツ
プの端部をハイブリツドIC及びICダイ上の各電
極に圧力ボンデイングして行なう。
〔実施例〕
以下、添付図を参照して本発明の好適な実施例
を説明する。なお、第1図は本発明の好適な実施
例の斜視図であり、第2図は第1図の部分的平面
図であり、第3図は第2図の線3−3に沿う断面
図である。
以下「ダイ」というICチツプ10をハイブリ
ツドIC12に物理的に設け、はり付ける。ハイ
ブリツドIC12の表面上には、信号伝達ストリ
ツプ16及び隣接する接地板ストリツプ18及び
20から成る共面導波路14を設けている。共面
マイクロストラツプ導波路22は、共面導波路1
4の端部及びダイ10の電気的接点24間の電気
的接続を行なう。
共面マイクロストラツプ導波路22の構成を第
2及び第3図により詳細に示す。ポリイミドの如
き薄い誘電体物質で形成された基板26は、この
基板26上に互いにほぼ平行となつた3個の共面
ストラツプ28,30及び32用の支持基板とな
る。接地板ストラツプ28及び30を、中央信号
伝達ストラツプ32の各側部に配置する。信号伝
達ストラツプ32は司教冠のような形の端部34
及び36を有するが、その機能は後述する。
第3図に示す如く、信号伝達ストラツプ32及
び接地板ストラツプ28,30の各々を、ポリイ
ミド基板26内に実質的に埋め込む。このように
ストラツプを埋め込むことにより、隣接した1対
のストラツプ30及び32の間の間隙38と、1
対のストラツプ32及び28間の間隙40を、
夫々基板26の誘電体物質が実質的に占める。
接地板ストラツプ30及び28の各々の幅は第
2図にd1と示す所定の幅である。同様に信号伝達
ストラツプ32も、司教冠のような形の端部を除
いて所定の幅であり、第2図にd2で示す。接地板
ストラツプ30及び28が実際に接地板として機
能するために、これら接地板の寸法d1は最小値よ
りも広いことのみが必要である。よつて所望なら
ば、寸法d1を幅広にできる。好適な実施例におい
て、寸法d2は2.5ミル(=63.5μm)であり、寸法
d1は6ミル(=152.4μm)である。よつて、d1
6ミル(=152.4μm)よりも広くできるが、2.5
(=63.5μm)幅の信号伝達ストラツプ32に対
し、ストラツプ30及び28が接地板として機能
するには6ミル(=152.4μm)幅で充分なので、
これより幅を広くすることに特別な利点はない。
隣接するストラツプ間の間隙38及び40の各々
は、好適な実施例において0.5ミル(=12.7μm)
である。間隙38及び40内に誘電体物質が存在
するので、誘電体物質がない場合よりも間隙の幅
を広くできる。例えば、誘導体を空気とすると、
ストラツプ間の間隙は0.17ミル(=4.32μm)のオ
ーダにしなければならず、従来の製造工程により
その許容差を保つのは難しい。
共面マイクロストラツプは、ハイブリツド回路
12上に設けた共面導波路14に連続している。
そのようなものとして、通常50オームのオーダで
ある共面導波路14のインピーダンスと同じイン
ピーダンスになるように意図している。
任意の共面導波路のインピーダンスは式Z0
L/Cで決まる。なお、Z0は導波路のインピーダ
ンス、Lはインダクタンス、Cは容量である。よ
つて、共面導波路構造のインピーダンスは、導体
28,30及び32間の容量で決まるが、この容
量は、基板物質の誘電率、マイクロストラツプの
寸法、中央信号伝達導体及び2個の接地板導体間
の間隙、即ち間隙で決まる。
好適な実施例においては、中央ストラツプ、即
ち信号伝達ストラツプ32をICダイ10の接続
端子24に物理的にボンデイングできるように、
このストラツプ32をできるだけ小さく作るのが
望ましい。これら端子24は、ワイヤ・ボンデイ
ング用に予め設計しておく、よつて、可能なら
ば、ストラツプの寸法を、接続端子と共に利用し
ようとするワイヤの寸法に少なくとも達するよう
にする。ここで説明したマイクロストラツプの製
造工程において固有の実際的な限度は、2.5ミル
(=63.5μm)のオーダである。
第3図に示す如く、マイクロストラツプ28,
30及び32を誘電体基板26内に実質的に埋め
込む。薄い上面は基板26から突き出ていてもよ
いが、マイクロストラツプ28,30及び32は
基板26の上面と同一平面となるのが好ましい。
よつて、間隙38及び40は、誘電体物質で実質
的に埋まつている。マイクロストラツプ28,3
0及び32の各々の厚さはできるだけ薄いのがよ
いが、導体の厚さの実際的な制限により、この厚
さの下限は約8μm±2μmになる。
マイクロストラツプの寸法が既知であり、ポリ
イミド基板の誘電体物質がマイクロストラツプ間
の隣接した間隙を実質的に埋めていると仮定する
と、形成された共面導波路のインピーダンスは、
上述のグプタ、ガーグ及びバールによる教科書
「マイクロストリツプ・ライン及びスロツトライ
ン」(1979年にアーテク・ハウス・インコーポレ
イテツドから出版)の257〜267ページの記載を参
照して決定してもよい。この教科書を利用して、
任意所望のインピーダンスにするために、隣接し
たマイクロストラツプ間の間隙を決定できるし、
調整できる。上述の如く、ハイブリツドIC上に
設けた共面導波路の標準インピーダンスは通常50
オームである。これにより、所定パラメータの好
適な実施例においては、間隙38及び40は各々
0.5ミル(=12.7μm)にすべきである。
第2図に示す如く、ハイブリツドIC12及び
ICダイ10に各ストラツプの端部を物理的にボ
ンデングできるように導体が基板から充分に出
る。各端部での浮遊容量を減らすために、信号伝
達ストラツプ32の端部34及び36は、司教冠
のような形になつている。これにより、共面導波
路22のインピーダンスをその長さ全体にわたつ
て、実質的に一定に保つ。
共面マイクロストラツプ22を形成するため
に、好適には金又は貴金属で作つた所定長で所定
の薄さのストラツプを、所定長のポリイミド薄板
に埋め込む。ストラツプはこの薄板の端部にも重
なるが、この端部を削除して余分な物質を取去
る。次に、マイクロストラツプ28,30及び3
2の端部をICダイ10及びハイブリツドIC12
の各電極点に圧力ボンデイングする。この工程に
は従来の圧力ボンデイング装置を用いてもよい。
この従来装置の例としては、ペンシルバニア州ホ
ーシヤムのクリクケ・ソフア・コーポレイシヨン
製クリクケ・ソフア4010型ウエツジ・ボンダーが
ある。
マイクロストラツプを作るには金が好適である
が、銀、銅又はアルミニウムの如き高導電率の他
の金属を利用してもよい。
〔発明の効果〕
上述の如く本発明の電気接続装置によれば、信
号伝達ストラツプの両側に所定間隔で接地ストラ
ツプを設けているので周波数の非常に高い信号ま
でを減衰させることなく2個の半導体素子間を接
続できる。また、これらストラツプは誘電体基板
に埋つているので、ストラツプ間の間隙を広くで
き、製造が容易になる。
【図面の簡単な説明】
第1図は本発明の好適な一実施例の斜視図、第
2図は第1図の部分的平面図、第3図は第2図の
線3−3に沿う断面図である。 図において、26は誘電体基板、28及び30
は接地ストラツプ、32は信号伝達ストラツプで
ある。

Claims (1)

    【特許請求の範囲】
  1. 1 誘電体基板に埋め込まれた信号伝達ストラツ
    プと、上記誘電体基板に埋め込まれ、上記信号伝
    達ストラツプの両側に所定間隔で設けられた接地
    ストラツプとを具えた電気接続装置。
JP61050237A 1985-03-07 1986-03-07 電気接続装置 Granted JPS61222246A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/709,463 US4600907A (en) 1985-03-07 1985-03-07 Coplanar microstrap waveguide interconnector and method of interconnection
US709463 1985-03-07

Publications (2)

Publication Number Publication Date
JPS61222246A JPS61222246A (ja) 1986-10-02
JPH0321089B2 true JPH0321089B2 (ja) 1991-03-20

Family

ID=24849956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61050237A Granted JPS61222246A (ja) 1985-03-07 1986-03-07 電気接続装置

Country Status (5)

Country Link
US (1) US4600907A (ja)
EP (1) EP0195520B1 (ja)
JP (1) JPS61222246A (ja)
CA (1) CA1240371A (ja)
DE (1) DE3666311D1 (ja)

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CN105785299A (zh) * 2014-12-24 2016-07-20 北京无线电计量测试研究所 片上测量系统的共面波导反射幅度标准器及其设计方法

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EP0195520A1 (en) 1986-09-24
JPS61222246A (ja) 1986-10-02
US4600907A (en) 1986-07-15
DE3666311D1 (de) 1989-11-16
EP0195520B1 (en) 1989-10-11
CA1240371A (en) 1988-08-09

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