JPH0316327U - - Google Patents
Info
- Publication number
- JPH0316327U JPH0316327U JP1989076527U JP7652789U JPH0316327U JP H0316327 U JPH0316327 U JP H0316327U JP 1989076527 U JP1989076527 U JP 1989076527U JP 7652789 U JP7652789 U JP 7652789U JP H0316327 U JPH0316327 U JP H0316327U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- solder bumps
- electrode portions
- flip
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 5
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1412—Layout
- H01L2224/14179—Corner adaptations, i.e. disposition of the bump connectors at the corners of the semiconductor or solid-state body
Landscapes
- Wire Bonding (AREA)
Description
第１図、第２図はそれぞれ異なる本考案実施例
の構成を示すチツプ裏面図、第３図は従来のフリ
ツプチツプ形半導体素子のチツプ裏面図である。
図において、１……チツプ、２……はんだバン
プ、ｄ１，ｄ２，ｄ３……バンプ径、ｌ１，ｌ２
……はんだバンプの相互間隔。
FIGS. 1 and 2 are rear views of a chip showing the configurations of different embodiments of the present invention, and FIG. 3 is a rear view of a chip of a conventional flip-chip type semiconductor device. In the figure, 1...chip, 2...solder bump, d1, d2, d3...bump diameter, l1, l2
... mutual spacing of solder bumps.
Claims (1)
電極部を形成したフリツプチツプ形半導体素子に
おいて、チツプの四隅コーナ部分に位置する電極
部のはんだバンプをチツプの辺中央部分に位置す
る電極部のはんだバンプよりも径大なバンプとし
たことを特徴とするフリツプチツプ形半導体素子
。 ２ 四角形のチツプ周辺部にはんだバンプ付きの
電極部を形成したフリツプチツプ形半導体素子に
おいて、チツプの四隅コーナ部分に並ぶはんだバ
ンプ付き電極部の相互間隔をチツプの辺中央部分
に並ぶはんだバンプ付き電極部の相互間隔よりも
小に設定したことを特徴とするフリツプチツプ形
半導体素子。[Claims for Utility Model Registration] 1. In a flip-chip type semiconductor device in which electrode portions with solder bumps are formed around the periphery of a square chip, the solder bumps of the electrode portions located at the four corners of the chip are placed in the center of the sides of the chip. A flip-chip type semiconductor device characterized in that the diameter of the bump is larger than that of the solder bump of the located electrode part. 2. In a flip-chip type semiconductor device in which electrode portions with solder bumps are formed around the periphery of a square chip, the mutual spacing between the electrode portions with solder bumps lined up at the four corners of the chip is changed to the electrode portions with solder bumps lined up at the center of the side of the chip. 1. A flip-chip type semiconductor device characterized in that the mutual spacing is set smaller than the mutual spacing of .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989076527U JPH0316327U (en) | 1989-06-29 | 1989-06-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989076527U JPH0316327U (en) | 1989-06-29 | 1989-06-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0316327U true JPH0316327U (en) | 1991-02-19 |
Family
ID=31618078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989076527U Pending JPH0316327U (en) | 1989-06-29 | 1989-06-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0316327U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08298264A (en) * | 1995-04-27 | 1996-11-12 | Hitachi Ltd | Electronic circuit device |
| JP2006271522A (en) * | 2005-03-28 | 2006-10-12 | Sanyo Chem Ind Ltd | Assembly type portable western-style toilet bowl |
-
1989
- 1989-06-29 JP JP1989076527U patent/JPH0316327U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08298264A (en) * | 1995-04-27 | 1996-11-12 | Hitachi Ltd | Electronic circuit device |
| JP2006271522A (en) * | 2005-03-28 | 2006-10-12 | Sanyo Chem Ind Ltd | Assembly type portable western-style toilet bowl |