JPH01115238U - - Google Patents
Info
- Publication number
- JPH01115238U JPH01115238U JP1039488U JP1039488U JPH01115238U JP H01115238 U JPH01115238 U JP H01115238U JP 1039488 U JP1039488 U JP 1039488U JP 1039488 U JP1039488 U JP 1039488U JP H01115238 U JPH01115238 U JP H01115238U
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- point solder
- pellet
- semiconductor device
- metal substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000008018 melting Effects 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 2
- 239000008188 pellet Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 238000010030 laminating Methods 0.000 claims 1
- 238000003466 welding Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
第１図は、本考案に係る半導体装置の要部の断
面図である。
１……金属基板、２……高融点半田、３……低
融点半田、４……ペレツト。
FIG. 1 is a sectional view of a main part of a semiconductor device according to the present invention. 1... Metal substrate, 2... High melting point solder, 3... Low melting point solder, 4... Pellet.
Claims (1)
積層溶着して、ペレツトを取付けたことを特徴と
する半導体装置。 A semiconductor device characterized in that a pellet is attached to a metal substrate by successively laminating and welding high melting point solder and low melting point solder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1039488U JPH01115238U (en) | 1988-01-28 | 1988-01-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1039488U JPH01115238U (en) | 1988-01-28 | 1988-01-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01115238U true JPH01115238U (en) | 1989-08-03 |
Family
ID=31218018
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1039488U Pending JPH01115238U (en) | 1988-01-28 | 1988-01-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01115238U (en) |
-
1988
- 1988-01-28 JP JP1039488U patent/JPH01115238U/ja active Pending