JPS6251742U - - Google Patents

Info

Publication number
JPS6251742U
JPS6251742U JP1985142783U JP14278385U JPS6251742U JP S6251742 U JPS6251742 U JP S6251742U JP 1985142783 U JP1985142783 U JP 1985142783U JP 14278385 U JP14278385 U JP 14278385U JP S6251742 U JPS6251742 U JP S6251742U
Authority
JP
Japan
Prior art keywords
substrate
semiconductor chip
chip
bump members
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985142783U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985142783U priority Critical patent/JPS6251742U/ja
Publication of JPS6251742U publication Critical patent/JPS6251742U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401Structure
    • H01L2224/1403Bump connectors having different sizes, e.g. different diameters, heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141Disposition
    • H01L2224/1412Layout
    • H01L2224/1414Circular array, i.e. array with radial symmetry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による半導体装置における半導
体チツプ上の半田バンプの配置を示す平面図、第
2図は従来の半導体装置における半導体チツプ上
の半田バンプの配置を示す平面図、第3図は従来
の半田バンプによるチツプ接続の状態を示す側面
図である。 1……半導体チツプ、2……基板、31,34
,41〜48……半田バンプ。
FIG. 1 is a plan view showing the arrangement of solder bumps on a semiconductor chip in a semiconductor device according to the present invention, FIG. 2 is a plan view showing the arrangement of solder bumps on a semiconductor chip in a conventional semiconductor device, and FIG. 3 is a plan view showing the arrangement of solder bumps on a semiconductor chip in a conventional semiconductor device. FIG. 3 is a side view showing the state of chip connection using solder bumps. 1... Semiconductor chip, 2... Substrate, 31, 34
, 41 to 48...Solder bumps.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体チツプに該チツプを基板に接続するため
の複数のバンプ部材を設け、該バンプ部材の前記
基板との接触面積を半導体チツプ上で熱歪みが起
る中心から離れるほど大きくしたことを特徴とす
る半導体装置。
A semiconductor chip is provided with a plurality of bump members for connecting the chip to a substrate, and the contact area of the bump members with the substrate is increased as the distance from the center where thermal distortion occurs on the semiconductor chip increases. Semiconductor equipment.
JP1985142783U 1985-09-20 1985-09-20 Pending JPS6251742U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985142783U JPS6251742U (en) 1985-09-20 1985-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985142783U JPS6251742U (en) 1985-09-20 1985-09-20

Publications (1)

Publication Number Publication Date
JPS6251742U true JPS6251742U (en) 1987-03-31

Family

ID=31051838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985142783U Pending JPS6251742U (en) 1985-09-20 1985-09-20

Country Status (1)

Country Link
JP (1) JPS6251742U (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03119740A (en) * 1989-10-02 1991-05-22 Hitachi Ltd Structure of semiconductor device and its manufacturing apparatus
JPH03159144A (en) * 1989-11-16 1991-07-09 Hitachi Ltd Semiconductor device
JPH05175274A (en) * 1991-12-26 1993-07-13 Matsushita Electric Ind Co Ltd Chip component
JP2010529673A (en) * 2007-06-07 2010-08-26 シリコン・ワークス・カンパニー・リミテッド Pad layout structure of semiconductor chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03119740A (en) * 1989-10-02 1991-05-22 Hitachi Ltd Structure of semiconductor device and its manufacturing apparatus
JPH03159144A (en) * 1989-11-16 1991-07-09 Hitachi Ltd Semiconductor device
JPH05175274A (en) * 1991-12-26 1993-07-13 Matsushita Electric Ind Co Ltd Chip component
JP2010529673A (en) * 2007-06-07 2010-08-26 シリコン・ワークス・カンパニー・リミテッド Pad layout structure of semiconductor chip

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