JPH0385641U - - Google Patents
Info
- Publication number
- JPH0385641U JPH0385641U JP1989147629U JP14762989U JPH0385641U JP H0385641 U JPH0385641 U JP H0385641U JP 1989147629 U JP1989147629 U JP 1989147629U JP 14762989 U JP14762989 U JP 14762989U JP H0385641 U JPH0385641 U JP H0385641U
- Authority
- JP
- Japan
- Prior art keywords
- flip
- dam
- chip
- chip bonding
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Landscapes
- Wire Bonding (AREA)
Description
第１図から第３図は本願考案に係る図面で、第
１図、第２図、第３図はフリツプチツプボンデイ
ング用基板にＩＣチツプを搭載した状態の説明図
、第４図、第５図は従来例を示す図面であつて、
従来の基板にＩＣチツプを搭載した場合の状態を
示す説明図である。
１……はんだバンプ、２……ＩＣチツプ、３…
…はんだダム、４……基板、５……電極。
1 to 3 are drawings related to the invention of the present application, and FIGS. 1, 2, and 3 are explanatory views of the state in which an IC chip is mounted on a flip-chip bonding substrate, and FIGS. 4 and 5. The figure is a drawing showing a conventional example,
FIG. 2 is an explanatory diagram showing a state in which an IC chip is mounted on a conventional board. 1...Solder bump, 2...IC chip, 3...
...Solder dam, 4...Substrate, 5...Electrode.
Claims (1)
て、チツプ側のバンプと接続される電極の周囲に
ダムを形成し、前記ダムは前記電極を底面にした
テーパー状としたことを特徴とするフリツプチツ
プボンデイング基板。 1. A flip-chip bonding substrate to be subjected to flip-chip bonding, characterized in that a dam is formed around an electrode connected to a bump on the chip side, and the dam has a tapered shape with the electrode as the bottom surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989147629U JPH0385641U (en) | 1989-12-21 | 1989-12-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989147629U JPH0385641U (en) | 1989-12-21 | 1989-12-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0385641U true JPH0385641U (en) | 1991-08-29 |
Family
ID=31694134
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989147629U Pending JPH0385641U (en) | 1989-12-21 | 1989-12-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0385641U (en) |
-
1989
- 1989-12-21 JP JP1989147629U patent/JPH0385641U/ja active Pending