JPH0315823B2 - - Google Patents

Info

Publication number
JPH0315823B2
JPH0315823B2 JP60114872A JP11487285A JPH0315823B2 JP H0315823 B2 JPH0315823 B2 JP H0315823B2 JP 60114872 A JP60114872 A JP 60114872A JP 11487285 A JP11487285 A JP 11487285A JP H0315823 B2 JPH0315823 B2 JP H0315823B2
Authority
JP
Japan
Prior art keywords
temperature
temperature sensor
wafer
chip
trimming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP60114872A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61272959A (ja
Inventor
Minoru Odajima
Michiaki Yamagata
Yukikyo Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP60114872A priority Critical patent/JPS61272959A/ja
Publication of JPS61272959A publication Critical patent/JPS61272959A/ja
Publication of JPH0315823B2 publication Critical patent/JPH0315823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP60114872A 1985-05-28 1985-05-28 半導体装置のトリミング方法 Granted JPS61272959A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60114872A JPS61272959A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60114872A JPS61272959A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Publications (2)

Publication Number Publication Date
JPS61272959A JPS61272959A (ja) 1986-12-03
JPH0315823B2 true JPH0315823B2 (enrdf_load_stackoverflow) 1991-03-04

Family

ID=14648794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60114872A Granted JPS61272959A (ja) 1985-05-28 1985-05-28 半導体装置のトリミング方法

Country Status (1)

Country Link
JP (1) JPS61272959A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS61272959A (ja) 1986-12-03

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