JPH0312748B2 - - Google Patents

Info

Publication number
JPH0312748B2
JPH0312748B2 JP58087346A JP8734683A JPH0312748B2 JP H0312748 B2 JPH0312748 B2 JP H0312748B2 JP 58087346 A JP58087346 A JP 58087346A JP 8734683 A JP8734683 A JP 8734683A JP H0312748 B2 JPH0312748 B2 JP H0312748B2
Authority
JP
Japan
Prior art keywords
access control
vector
vector register
data
register group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58087346A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59212977A (ja
Inventor
Kazushi Sakamoto
Hiroshi Tamura
Juji Oinaga
Shoji Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8734683A priority Critical patent/JPS59212977A/ja
Publication of JPS59212977A publication Critical patent/JPS59212977A/ja
Publication of JPH0312748B2 publication Critical patent/JPH0312748B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
JP8734683A 1983-05-18 1983-05-18 ベクトルデ−タ処理装置 Granted JPS59212977A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8734683A JPS59212977A (ja) 1983-05-18 1983-05-18 ベクトルデ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8734683A JPS59212977A (ja) 1983-05-18 1983-05-18 ベクトルデ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS59212977A JPS59212977A (ja) 1984-12-01
JPH0312748B2 true JPH0312748B2 (zh) 1991-02-20

Family

ID=13912307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8734683A Granted JPS59212977A (ja) 1983-05-18 1983-05-18 ベクトルデ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS59212977A (zh)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199427A (zh) * 1975-02-27 1976-09-02 Hitachi Ltd
JPS5757370A (en) * 1980-09-22 1982-04-06 Fujitsu Ltd Access control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5199427A (zh) * 1975-02-27 1976-09-02 Hitachi Ltd
JPS5757370A (en) * 1980-09-22 1982-04-06 Fujitsu Ltd Access control system

Also Published As

Publication number Publication date
JPS59212977A (ja) 1984-12-01

Similar Documents

Publication Publication Date Title
US4149242A (en) Data interface apparatus for multiple sequential processors
US4600986A (en) Pipelined split stack with high performance interleaved decode
CA1297195C (en) Digital signal processor
US4490786A (en) Vector processing unit
US5581773A (en) Massively parallel SIMD processor which selectively transfers individual contiguously disposed serial memory elements
US6145027A (en) DMA controller with split channel transfer capability and FIFO buffering allowing transmit channel to get ahead of corresponding receive channel by preselected number of elements
JP2744526B2 (ja) 準１６基数プロセッサおよび方法
EP0424618A2 (en) Input/output system
JPH06149545A (ja) Ｃｐｕと乗算器とを有する半導体集積回路
CA2478570A1 (en) Data processing apparatus and system and method for controlling memory access
JPS623461B2 (zh)
CA1301944C (en) Computation processor comprising several series- connected stages, computer and computing method using the said processor
JPH0312748B2 (zh)
JPS6347835A (ja) パイプライン計算機
JPS61224051A (ja) バッファメモリ制御方法
JP2547219B2 (ja) ベクトルデータのアクセス制御装置及び方法
JPH0276069A (ja) ベクトル演算処理装置
JP2643116B2 (ja) 主記憶制御装置
JPS59218558A (ja) 情報処理装置
JPH0368045A (ja) 主記憶制御方式
JPH0317143B2 (zh)
JPH0332829B2 (zh)
JPS63118965A (ja) Ｄｍａワ−ド転送方式
JPH04133144A (ja) 情報処理装置
JPS60146362A (ja) ベクトルレジスタの構成方式