JPH03126080A - Character display device - Google Patents

Abstract

PURPOSE:To rewrite, enlarge, and scroll a screen by utilizing a standard character generator instead of a bit map memory. CONSTITUTION:A third converting means 10-2 converts and controls a character address to a refresh memory 2 and a raster address to character generators 4-1 and 4-2 according as a standard or enlarged character is displayed. Timing control means 16-1, 16-2 vary the action timing of the refresh memory 2 in standard character display with enlarged character display. A display area designating means 5 designates the address of a display screen and uses the output of the third converting means 10-2 as the address of the refresh memory 2, whereby the display area in enlargement display is designated. A display means 6 displays a character pattern from switching means 10-1 and 10-3 or a second converting means 13-2 on the display screen. Thus, the screen can be instantaneously rewritten, enlarged and scrolled.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a character display device, and particularly to a character display device for enlarging and displaying a displayed character font pattern on a display.

(Prior Art) Some conventional character display devices generally use a character method or a bitmap method.

FIG. 8(a) is a block diagram showing the configuration of a character display device using the character system. In the same figure (a>, 1
is a central processing unit (hereinafter abbreviated as CPU) that controls the entire device; 2 is a refresh memory (hereinafter abbreviated as RM) that stores character codes; 3 is a CRT controller (hereinafter abbreviated as CRTC) that controls the display of the CRT; 4 5 is a character generator (hereinafter abbreviated as CG) that outputs character patterns using character codes, and 5 is a character generator that outputs character patterns for one line of one character sentence.
Parallel/serial converter circuit that sends out bits one by one (
(hereinafter abbreviated as PS), 6 is a CRT that displays characters,
7 is an oscillation circuit that operates CRTC3 and PS5.

Next, the operation will be explained.

The character code written to RM2 by CPU1 is CR
It is read by TC3 and sent to CG4. CG4 outputs a character pattern from this character code. This character pattern is converted into a 1-bit output by the PS5, and outputted to the CRT 6 one bit at a time by the oscillation circuit 7. CRT
6 displays this data on the display screen.

When changing the displayed characters, the CPU'l may access RM2 and rewrite the character code.

In a character display device using the character method as described above, the R
When using this device on a high-definition CRT6, the operation of M2, CG4, and PS5 must be completed.
Since the display time for each dot on CRT6 is extremely short,
- It was difficult to operate these circuits within the character display time. Furthermore, it was not possible to enlarge characters or to scroll to see non-standard areas that were displayed with standard characters but did not fit within the screen when enlarged.

In order to solve the above problem, the present applicant has filed a patent application filed in 1986-
No. 276,668 proposed a character display device that has a plurality of standard and enlarged CGs and can be scroll-displayed by specifying a display address. The structure of the character display device is shown in FIG.

In FIG. 9, the same reference numerals as in FIG. 8 indicate the same components. In the embodiment of FIG. 9, two standard CG4-1.4-2.4 enlarged CG4-3 are used for RM2.
~4-6 is used. 91 to 9-8 are latch circuits that latch the input at the rising edge of the clock from the oscillation circuit 7. 101 to 10-3 are multiplexers (hereinafter abbreviated as MPX) for switching input signals. Reference numeral 11 denotes a bus buffer to which a data bus is connected only when the CPU 1 reads or writes RM2. 12 is a flip-flop (hereinafter abbreviated as F/F), 13 is a read-only memory (hereinafter referred to as RO).
(abbreviated as M), 14 is an adder (hereinafter referred to as A) that specifies the address.
(abbreviated as DD).

The latch circuits 9-1 to 9-3 are provided between the CRTC3 and PS5, and are used to turn on/off the display of the CRT6 outputted from the CRTC3.
Latch display control signals such as off signal, high brightness, inversion, and blink modes. Latch circuits 9-4 to 9-8 are for latching data. Latch circuit 9-4 is CR
Connected between TC3 and MPXIO-3, latches address data from CRTC3. Latch circuits 9-5 and 9-6 are connected between RM2 and CG4-1, 4-2, respectively, and latch even and odd addresses from RM2, respectively. Latch circuit 97.9-8 is CG4
MPXIO-2 latches the character patterns from -1.4-2 and outputs them. Note that the latch circuit 9-1 and the latch circuit 9-4. Latch circuit 9-2 and latch circuit 9-
5-9-6. Latch circuit 9-3 and latch circuits 9-7 to 9
-8 latches input signals with the same phase.

MPXlo-1 is "CRTC3 (7) 7th L/S data"10" CRTC clock inverted data" (cRT Ca
This switching is done by the display on/off signal of CRTC3; when it is on ("1"), it is on the CRTCa side, and when it is off, it is on the CPUl side. MPXlo-2 CG4-1.4-2 input via latch circuit 9-7.9-8
The character pattern data of is switched and output to PS5. This switching is performed when the CRTC clock is “0”.
When it is 1° "'1", it becomes the respective output of CG4-2.

When the display on/off signal latched by the latch circuit 9-1 is off (“0”) and the CPU 1 issues the WRITE signal 110 IT (RM2 is in write mode), the pass buffer 11 opens the buffer and receives the data from the CPU 1. Data of(
RM2 transfer of character code).

Furthermore, when the display on/off signal is on ("1"), the buffer is closed and no data is exchanged between the CPU 1 and RM2.

Next, the operation will be explained with reference to the timing diagram of FIG.

First, a character code is written into RM2 by CPU1. That is, when the display on/off signal latched by the latch circuit 9-1 is off, the CPU 1 outputs the WRITE signal 1.
10 Set RM2 to write mode through the OR gate of PI, and write the character code input from CPU1 via bus buffer 111 to the address of RM2 input from CPtJl via MPXlo-1.

Next, a CRTC clock as shown in FIG. 10 is sent to the CRTC 3 from the oscillation circuit 7. CRTC3 is CRT
The operation starts at the rising edge of the C clock, but the address is output after a predetermined time (time required for access). In order to synchronize the data, the latch circuit 9-
It is latched at 4. This latched data is CRTC
It is sent to RM2 via MPXlo-1 along with an inverted version of the clock. This inverted data of the CRTC clock is used as the lowest address of RM2.

For example, as shown in FIG. 11, if the address of RM2 is expressed as a binary number from O to n, the CPU 1 can write to/read from RM2 using the address Q-n, but the CRT
In the case of C3, in order to display two characters in one cycle of the CRTC clock, the addresses O to n-1 are set to MPXlo-1.
, that is, input to addresses 1 to n of RM2, and
Inverted data of the CRTC clock, ie, O'' and H1IT, are input to the O address (lowest order) of RM2.

In this way, when the CRTC clock rises, an even address is input to RM2, and when it falls, an odd address (previous address +1) is input.

As a result, in the one-character address of CRTC3 (cRTC
RM2 outputs a character code of a two-character sentence in one cycle of the clock. Among these character codes, the character codes (a2, b2...) at even addresses are latched by the latch circuit 9-5 at the rising edge of the CRTC clock, and the character codes (al, bl...) at odd addresses are latched by the latch circuit 9-5.
-6, it is latched at the falling edge of the CRTC clock. The character code output of latch circuit 9-5 is CG4-1
is output as a character pattern (A2, B2, . . .), and further latched by the latch circuit 9-7.

Similarly, the character code output of latch circuit 9-5 is CG4-
2 is output as a character pattern (AI, Bl...) and latched by the latch circuit 9-8. The character patterns latched by these two latch circuits 9-7 and 9-8 are output to MPXlo-2. This MPXlo
-2 is the latch circuit 9 when the CRT clock is at high level.
When the character pattern data (A2, B2, . . . ) of -7 is at a low level, the character pattern data (A1, B1, . . . ) of the latch circuit 9-8 are outputted to the PS5, respectively.

As a result, the two character patterns of CG4-1 and 4-2 are successively output to the PS5. This allows the PS5 to continuously output character patterns to the CRT 6 using the clock of the oscillation circuit 7.

Note that since the display control signal of the CRT 6 outputted from the CRTC 3 is synchronized with the character pattern data by the latch circuits 9-1 to 9-3, no deviation occurs. When rewriting characters, it is sufficient to simply rewrite the character code of RM2 using the CPUI.

Next, the operation in case of enlarged character display will be described.

Here, conditions for standard characters, enlarged characters, and display characters in this embodiment are set as shown in FIG.

In other words, if the enlarged characters are doubled in height and width, ■ Standard characters: X dots horizontally, Y dots vertically (Figure 12 (a)) ■ Enlarged characters: 2X dots horizontally, 2Y dots vertically (
Figure 12 (b)) ■ Display characters (standard): 2 m characters horizontally, 2 m characters vertically (Fig. 12 (c)) ■ Display characters (enlarged): m characters horizontally, n characters vertically (
Figure 12(c)).

This condition is so that even when changing from standard characters to enlarged characters, all character fonts are displayed and parts of the characters are not missing.

When a signal for displaying enlarged characters is written from the CPU 1 to the F/F 12, the ROM 13 is written to the C
Converts the RTC3 address signal and raster signal.

FIGS. 13A to 13C show the address of each character when displaying standard characters, the 7 addresses of CRTC, and the address of each character when displaying enlarged characters, respectively.

In other words, the standard character display on the screen is 2m horizontal character 1.1 (I
Since there are 2n characters, the address of the character is 4mn from O to 4mn-1 (FIG. 13(a)). Also, since the CRTC3 counts 2 horizontal characters as 1 character, it is m characters horizontally and 2n characters high, and the character address is from O to
It becomes 2 mn of 2 nm-1 (Fig. 13(b)).

Next is the enlarged character display on the screen (Fig. 13(c)).
In this case, it will be enlarged twice both vertically and horizontally, so the horizontal character will be m characters,
The length is n characters. However, the address of the characters is 2m to 3m
-1 (in case of no scrolling). Furthermore, in this case, since the number of rasters for the same address is doubled (standard y raster→enlarged 2y raster), raster conversion is also required. This conversion is shown in FIG.

In Figure 14, the output address of CRTC3 is O~2m
n-1, the output raster is 0-V-1, but the ROM13
Therefore, the address in enlarged mode is 0-m-1, 2m
~3m-1, -2m (n-1) ~(2n-1)m-1
Therefore, the raster becomes O~2y-1.

The address and raster are determined as above, and CG4-3
~4-6 works. In this case, when the standard CG41 is operated, raster 0-y-1 is accessed to CG43, and raster y-2y-1 is accessed to CG4-6.
It becomes 5. Here, the CG access method is shown in Figure 15 (a
) to (d). In FIG. 15, (a) shows the operation order of CG4-1, 4-2 in the case of standard character display, where ■ indicates CG4-1 and ■ indicates CG4-2. In this case, assuming that each of CG4-1 and CG4-2 can display one character, the font content will be as shown in (c). Next, the case of enlarged display is shown in (b). In this case, CG4-3 to CG4-6 require the operation order of ■ to ■, respectively, and their font contents are also (d
) must be like this. In addition, in (b), ■ to ■ indicate CG4-3 to CG4-6.

Next, a scroll address is also written to the F/F 12 from CPU'l. This output is added to the extended address by the ADD 14 and output.

FIG. 16 is an explanatory diagram of scrolling during enlarged display,
When you want to enlarge the part marked ■ shown in the same figure (a), press
If O@ is written in 12, the enlarged display of the part marked ■ will be displayed when the display is enlarged (FIG. 16(b)). Also, if you want to enlarge the part (■), write the value (2n-1>m) to F/F12, it will be added to the enlargement address by ADD14,
is displayed (Fig. 16(c)). Similarly, if you want to enlarge the parts marked ■ and ■, you can write m and 2 mm, respectively, in the F/F 12 (Fig. 16 (d) and (e)).

Even in this enlarged display, all standard characters can be displayed. It can also be used for vertical and horizontal enlargement in the same way.

Also, if you want to scroll up line by line, press F/
All I had to do was write 2m, 4m, 5m, '-2m (n-1) in F12 in sequence, and scroll horizontally one character at a time.

At times, 1.2.3. ...You can write m sequentially.

Furthermore, if you want to scroll in the opposite direction, you can do so by decreasing the values written to each F/F 12.

On the other hand, FIG. 8(b) is a block diagram showing the configuration of a character display device using the bitmap method.

In FIG. 3B, the same reference numerals as in FIG. 1A indicate the same components. Reference numeral 8 denotes a bit map memory (hereinafter abbreviated as BMM) which has a capacity corresponding to all bits of the CRT 6 and stores the character pattern of CG4.

Next, the operation will be explained.

The character code written to RM2 by CPU1 is CG4
is output as a character pattern.

The data is written to 8MM8. The 8MM8 data read out by the CRTC3 is converted into a 1-bit output by the PS5, and sequentially outputted to the CRT6 by the oscillation circuit 7. The CRT 6 displays this data on its display screen.

When changing the displayed characters, perform the following steps from ■ to ■.

■ CPU1 rewrites the character code of RM2.

■ CPU1 accesses RM2 and outputs the character pattern of CG4.

■ CPU1 reads the character pattern of CG4.

■ CPU1 writes a character pattern to 8MM8.

(Problems to be Solved by the Invention) However, the character display device having the above configuration has the following problems when used in a high-definition CRT or the like.

As mentioned above, the character display device of FIG. 8(a) has problems such as slow operation time and inability to change the size of the characters. The problem is solved by the character display device shown in the figure. However, with these character methods, multiple character generators are required for each type of character, so
If other types of characters were to be displayed, the character generator alone would have to have a large capacity, resulting in an increase in cost.

On the other hand, in the bitmap method shown in Fig. 8(b), rewriting a character requires the CPU to rewrite the number of vertical dots of the character.
1 leads RM2 and the character pattern of CG4 is 8MM
It is necessary to write to 8, which has the drawback of increasing the burden on the CPU 1.

Roughly speaking, when rewriting a character, if the CPU 1 uses a 16-bit data bus, the following processing is performed for a 24 dot x 24 dot character.

■ CPU1 writes the character code and the line number of that character to RM2.

■ CPU1 converts the character pattern of the character code of RM2 to C.
Read 16 bits each from G4 twice.

Further, it is necessary to input and output this data 2×24=48 times to the 8MM8 corresponding to the screen of the CRT6. As described above, the bitmap method requires a lot of effort and has the problem of taking a long time to rewrite the display.

Roughly speaking, only the type of characters required a Kirerakuta Digenerator.

The object of the present invention is to eliminate the above-mentioned disadvantages of requiring multiple types and multiple character generators (character method) and disadvantages of requiring too much rewriting time and multiple types of character generators (bitmap method). The object of the present invention is to provide a character display device that enables instantaneous rewriting, enlarging, and scrolling of the screen.

(Means for Solving the Problems) In order to solve the above problems, a character display device according to the present invention includes a refresh memory that stores character codes, a plurality of character generators that generate character patterns corresponding to the character codes, and a plurality of character generators that generate character patterns corresponding to the character codes. a switching means for switching the output signal of the character generator; a first switching means for converting the signal of the character generator into a bit width for horizontal expansion and outputting the signal;
a second converting means for changing and outputting the font of characters according to the signals and control signals of the plurality of character generators, and converting character addresses to the refresh memory and to the character generator depending on whether the character is displayed as a standard character or an enlarged character. a third conversion means for controlling the conversion of the raster address of the display screen; a timing control means for changing the operation timing of the refresh memory depending on the standard character display and enlarged character display; and a third conversion means for specifying the address of the display screen. A display area specifying means for specifying an area to be displayed during enlarged display, a display means for displaying the character pattern from the switching means or the second conversion means on the display screen by using the output of the means as an address of the refresh memory. It is something that

(Operation) The character display device configured as described above operates as follows. The refresh memory reads written character codes and supplies them to a plurality of character generators. The character generator outputs character patterns corresponding to input character codes to a switching means, such as a multiplexer, and also to a first conversion means, such as a shift register. The first conversion means converts the character generator signal into a bit width corresponding to the horizontal expansion during horizontal expansion, and the second conversion means, for example, the expansion RO
Output to M. The second conversion means can convert the character pattern of the character generator from the first conversion means into a plurality of character patterns and display the enlarged character pattern on the display means. The switching means sequentially selects the output of the character generator and continuously outputs the character pattern to the display means except during horizontal enlargement. On the other hand, the third conversion means outputs the character address to the refresh memory and the raster address to the character generator as they are in the case of standard character display, and converts the character address and raster address in the case of enlarged character display. and output it. Therefore, it is possible to instantly rewrite and enlarge the screen without using bitmap memory. Further, the display area specifying means can enlarge the enlarged display area by simply specifying a specific address on the display screen, for example, the minimum address, so scrolling during enlargement can be easily performed.

(Example) Examples of the character display device according to the present invention will be described in detail below.

FIGS. 1(a) and 1(b) are block diagrams showing the structure of the character display device of this embodiment. In FIG. 1, the same reference numerals as in FIG. 9 indicate identical components. In the device of this embodiment, CG4-3 to CG4-6 in FIG. 9 are removed, and a shift register (SR>15-1. .16
-2 is provided. 5R15-1 and 15-2 are provided as first conversion means for converting the outputs of CG4-1 and CG4-2, respectively, into a bit width for horizontal expansion.
Input the outputs of CG4-1 and CG4-2, respectively, and further input the outputs of CG4-1 and CG4-2 to ROM13-2 as the second conversion means.
Outputs 3 bits of R15-1 and 15-2. ROM1
3-2 inputs the above-mentioned 5R15-1 and 15-2, and roughly inputs the enlargement mode, vertical enlargement, triple signal, and enlarged raster as control signals, and changes the font of the character and outputs it. That is, this ROM13-2 operates in the horizontal expansion mode, and always outputs d(O11) at other times.The output of this ROM13-2 is ORed with the output of PS5 by an OR circuit, and is output to CRT6. On the other hand, MPXl
C8 input is added to o-2, and i is always in horizontal expansion mode.
t Oto, and otherwise output the inputs from the latch circuits 9-7 and 9-8, respectively, as in the case of FIG. As a result, when in horizontal enlargement mode (i.e., 2x horizontal enlargement, 2x vertical/horizontal enlargement, 3x horizontal enlargement, 3x vertical/horizontal enlargement),
The output of ROM13-2 remains unchanged, and in other modes (i.e., standard, 2x vertical enlargement, 3x vertical enlargement), PS
The output of 5 is output to the CRT 6.

Counters 16-1 and 16-2 are provided for 3x horizontal enlargement and are operated by 1/2 CRTC clock and 1 dot clock, respectively.

On the other hand, the latch timing of 5R15-1 and 15-2 is the same as that of the latch circuit 9-7, but this signal is different in the horizontal expansion mode and in other times. A FOR (exclusive OR) circuit 18 is provided in place of the inverter circuit that inputs the CRTC clock from the oscillation circuit 7 in FIG. 9 and outputs it to the MPXlo-3 and latch circuit 9-5.9-7. Input F12 and clock. F/F1 except when in horizontal enlargement mode
It becomes "1" input from 2 and acts as an inverter circuit for the clock, and works in the same way as in the case of Fig. 9. In horizontal expansion mode, it becomes 1101+ input from F/F 12 and outputs the input clock as it is. I made it.

In other words, when horizontally expanding, the counter 16-1 operating with 1/2 CRTC clock doubles the CRTC.
The TC clock was output.

This allows the latch circuits 9-5, 9-6 to operate at the same timing in the horizontal expansion mode. In addition,
During 3x horizontal expansion, counter 16-1 is 1/2 CRTC.
Generates a clock three times the clock.

Figure 2 (a>, (b) shows ROM13-1 in enlarged mode.
address, indicating the raster conversion. The ROM 13-1 outputs character addresses and raster addresses as they are or after conversion, depending on whether standard characters or enlarged characters are displayed.

In Figure 2, the output address of CRTC3 is O~2mn
-1, the output raster is 0-y-1, but the ROM13-
1, the MA address in 2x horizontal enlargement mode is 0 to m.
-1, 2m ~3m -1, -2m (2n-1)
~(4n-1)m-1, and the RA address is 0-V-
1 is repeated.

Also, the MA address in 2x vertical enlargement mode is Q-n
m-1, the same raster as the RA address O1O to V-1 is outputted twice in succession, and the process is repeated.

And in the vertical and horizontal expansion mode, the MA address is 0 to m-1
,0-m-1,2m ~3m-1,2m ~3m-1,
...(2n-2>m~(2n-1)m-'I, (2n
-2>m~(2n-1>m-1, the same row address is output twice, the RA address is also 0.0.~V-1, the same raster is output twice, and this is repeated.

On the other hand, in the case of 3x mode, in the case of horizontal expansion, the MA address is set to O, O, O, ~m/3-1. m/3-1. m/
3-1. The output is repeated three times as m, m, m-4/3m-1, and in the case of vertical expansion, the address is 0-m-
1,0~m-1,0~m-1,m~2m-1...2
(The same row address as n-1>m/3~2nm/3-1 is output three times in a row, and the raster is also 0,0,0~V-LV-1
, V-1 are output three times, and the process is repeated.

Then, when expanding vertically and horizontally, the MA address is 0,0°0-m
/3-1. m/3-1. m/3-1. m.

m, m-4/3m-1, ...... The same address is output three times, and the RA address is o, o, o-y-
Output the same raster 1, y-1, y-1 three times and repeat. Then, the two outputs of the enlarged raster (R
(output from OM13-1 and input to ROM13-2) is always 'o o' in standard mode and vertical enlargement mode.
Outputs 4400+1 or t when the width is doubled and the height and width are doubled.
Output O or 1 of t O1##.

This is the same for even and odd raster addresses.

And when 3x and horizontally and vertically enlarged, <(Oi ##,
4 (1 to 3, such as 10n at 11 tp)
Output.

This is required by dividing the RA address by 3 and adding 1.

The operation in the standard mode is the same as that shown in FIG. 9, so a description thereof will be omitted.

In addition, FIG. 3 (a> to h> shows the address of each character when displaying standard characters, the address of CRTC, and the address of each character when displaying enlarged characters.

Figures 3(a), (b) and (e) are similar to Figures 13(a), (b) and (c), respectively, and Figures 3(c), (d) and ( For f) to (h), the number of horizontal characters and the number of vertical characters are determined according to each enlargement mode.

Next, the displayed character pattern when enlarged is shown in Fig. 4(a).

Shown in (b). In this case, one character of CG4-1 is
The dots are 24 dots vertically, and the display area of the CRT 6 is 6 horizontally.
40 dots and 480 dots vertically.

Figure 5 shows standard, horizontal expansion, vertical expansion, and double angle (vertical and horizontal expansion)
This shows the output of the ROM 13-1 in the mode.

In this case, the width is 640 ÷ 20 = 32 characters, and the height is 480 ÷
24=20 lines. In other words, the displayed characters are 32X20
=640 characters.

Therefore, the address MA is O~639, and the raster is O~
23. Also, if the hidden area is a 5 character sentence, CRT
The number of characters in a single line sentence by C3 is 37 characters and the display area is 32.
It becomes a character. Among these, the display ON signal becomes 111 II in the display area, and characters can be displayed on the CRT 6. The output of this CRTC3 is determined by the ROM13-1 as standard, 2x or 3x horizontal expansion, 2x or 3x vertical expansion, 2x
Converted to double or triple horizontal and vertical enlargement. Among the outputs of ROM13-1, the CGON signal output becomes <(OPI) when spaced, and outputs CG4-1 and CG4-2 a l l "Q"
Make it.

Inputs to the ROM 13-1 include MA and raster addresses as well as vertical enlargement, horizontal enlargement, and triple signals from the F/F 12.

This F/F 12 roughly outputs an address and a double-angle mode signal 1.0. In the enlargement mode (horizontal enlargement and vertical enlargement), MPXlo-3 selects the ADD 14-1 side where the address data of F/F 12 is added to the address of ROM 13-1, and accesses RM2 from MPXIO-1.

RM2 outputs the 9 character code of the given address. CGI-1 and CGI-4-2 output character patterns from this code and the raster address of ROM 13-1. On the other hand, C
G4-2 outputs a character pattern in which the raster is shifted by one line by ADD14-2 during horizontal enlargement.

Then, the character pattern of CG4-1.4-2 is created at the same timing by the latch circuit 9-5. 2 are output respectively.

5R15-1 and 15-2 are latched by a clock having the same phase as that of the latch circuit 9-5, and shifted by a two-dot clock output from the oscillation circuit 7. Here, CG4-1 and CG
42 has a 16-bit pattern width, but SRI 5-1
．． It is input as a 20-bit pattern by 15-2. The details are shown in Figure 6 (a), input/output explanatory diagram, and Figure 6 (b).
This is shown in the operation explanatory diagram. As shown in Figures 6(a) and (b), the SR inputs are 22 (■0 to I21), and the output is 00-
There are 3 pieces of 02. SR latches the signals of IO~J21 when the input of CP becomes 1'', and outputs the data of IO~■2 to OO~O2.This data is stored in ROM13-2.
corresponding to N-1, N, and N+1 of XN-1, respectively.

They become XN, XN+1 and YN-1, YN, YN+1. In addition to these inputs, the ROM 13-2 also has a counter 16.
-2 outputs, and 3x mode signals are input. The counter 16-2 operates as a quaternary counter in modes other than the 3x mode, and operates as a ternary counter in the 3x mode. The contents of the code conversion of ROM13-2 are
Shown in Figures (a) and (b).

In this way, double-width characters with different character fonts can be displayed simply by changing the input to the enlargement circuit.

(Effects of the Invention) As described in detail above, according to the present invention, characters can be enlarged by two or three times using a standard character generator without using bitmap memory, and can be roughly It is also possible to change the font. From the above, it becomes possible to enlarge characters roughly four times or five times. In this way, a display character conversion device that is inexpensive and does not impose a burden on the CPU becomes possible.

[Brief explanation of the drawing]

FIG. 1(a) and FIG. 1(b) are a block diagram showing the configuration of an embodiment of the character display device according to the present invention, and FIG. 2(a) ) and Figure 2 (
Figure 3 (a) to (h) are standard character addresses, CRT
Diagram showing C address and enlarged character address, Figure 4 (a)
and Fig. 4(b) are combined to show one figure, and show the displayed character pattern when enlarged. Fig. 5 shows the display character pattern in standard, horizontal enlargement, vertical enlargement, and double angle (vertical and horizontal enlargement) modes. Figure 6(a) shows the output of ROM13-1 of 5R.
A circuit diagram showing the input and output of 15-1 and 15-2, Figure 6 (b
) is an explanatory diagram of the operation of Fig. 7 (a), and Fig. 7 (a> and Fig. 7 (b) are - bodies and show one figure, and RO
A diagram explaining the contents of M13-2 code conversion, Figure 8 (
a>, (b) is a diagram showing an example of the configuration of a conventional character display device,
9 is an improved character display device previously proposed by the present applicant, FIG. 10 is a timing diagram of the device in FIG. 9, FIG. 11 is an explanatory diagram of the operation of the device in FIG. 9, and FIG. 12
The figure shows the conditions for standard characters and enlarged characters used to explain the device in FIG. 9, FIG. 13 shows the standard character address, CRTC address, and enlarged character address of the device in FIG. 4 is a diagram showing character address and raster address conversion of the device in FIG. 9, FIG. 15 is an explanatory diagram of the CG access method of the device in FIG. 9, and FIG. 16 is an enlarged view of the device in FIG. 9. This is an explanatory diagram of scrolling. 1...Central processing unit (cPU), 2...Refresh memory (RM), 3...CRT controller (cR
TC), 4-1.4-2...Character generator (cG), 5...Parallel/serial conversion circuit (P
S), 6...CRT, 7...Oscillation circuit, 8...Pit map memory (BMM), 9-1 to 9-8...
Latch circuit, 10-1 to 10-3...Multiplexer (MPX>), 11...Pass buffer, 12...Flip-flop (F/F), 13-1 to 13-2...
Read-only memory (ROM>, 14-1 to 14-
2... crimping device (ADD>, 15-1-15-2...
Shift register (SR), 16-1 to 16-2...counter. Patent application Hitoki Electric Industry Co., Ltd. Patent application agent Patent attorney Mr. Yamamoto - Display characters when enlarged Figure 4 (b) 666- (Q) (b) Shift Reno Star input/output Figure 6 Configuration diagram of conventional character display device Fig. 8 RTC clock RM (2) output z+7+ + 121C
G (4-1) Output Z2 A2 82 C202C
G (4-2) Output Z+ A a, c D
E5 latch circuit (9-7) output Z2
A2 82 C202ε25 latch circuit (9-8) output Z+ A+ 81 CI OI
EIMPX<1O-2) Output Figure 9 Timing diagram Figure 9 Operation explanatory diagram @ Figure 11 Explanation of CG access method (Cd) CG access method Figure 15 Explanation of scrolling during enlarged display

Claims (1)

[Scope of Claims] (a) a refresh memory that stores character codes; (b) a plurality of character generators that generate character patterns corresponding to the character codes in the refresh memory; (c) output signals of the plurality of character generators; (d) a first converting means that converts the signal of the character generator into a bit width for horizontal expansion and outputs the converted signal; (e) changing the font of the character according to the signals of the plurality of character generators and the control signal; (f) a third conversion means that controls the conversion of character addresses to the refresh memory and raster addresses to the character generator depending on whether standard characters are displayed or enlarged characters; (g) (h) timing control means for changing the operating timing of the refresh memory depending on standard character display and enlarged character display; (h) enlargement by specifying the address of the display screen and using it as the address of the refresh memory together with the output of the third conversion means; A character display device comprising: a display area specifying means for specifying an area to be displayed during display; and (i) a display means for displaying a character pattern from the switching means or the second converting means on a display screen.