JPH03115407U - - Google Patents

Info

Publication number
JPH03115407U
JPH03115407U JP2404590U JP2404590U JPH03115407U JP H03115407 U JPH03115407 U JP H03115407U JP 2404590 U JP2404590 U JP 2404590U JP 2404590 U JP2404590 U JP 2404590U JP H03115407 U JPH03115407 U JP H03115407U
Authority
JP
Japan
Prior art keywords
carrier
integrated circuit
chip capacitor
hole
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2404590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2404590U priority Critical patent/JPH03115407U/ja
Publication of JPH03115407U publication Critical patent/JPH03115407U/ja
Pending legal-status Critical Current

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Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例によるマイクロ波
集積回路の平面図、第2図は第1図の−線に
おける断面図、第3図は従来のマイクロ波集積回
路の平面図、第4図は第3図の−線における
断面図である。 図において、1はキヤリア、2は誘電体基板、
3は伝送線路、4はチツプコンデンサ、5a,5
bはチツプコンデンサ4の電極、6は金ワイヤ、
7はスルーホール、8はキヤリア1の凸形状部を
示す。なお、図中、同一符号は同一、又は相当部
分を示す。
FIG. 1 is a plan view of a microwave integrated circuit according to an embodiment of this invention, FIG. 2 is a sectional view taken along the line - in FIG. 1, FIG. 3 is a plan view of a conventional microwave integrated circuit, and FIG. is a cross-sectional view taken along the - line in FIG. 3; In the figure, 1 is a carrier, 2 is a dielectric substrate,
3 is a transmission line, 4 is a chip capacitor, 5a, 5
b is the electrode of the chip capacitor 4, 6 is the gold wire,
7 indicates a through hole, and 8 indicates a convex portion of the carrier 1. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電体基板及びチツプコンデンサをキヤリアに
取付けて構成するマイクロ波集積回路において、
前記誘電体基板にスルーホールを形成し、このス
ルーホール直下の前記キヤリアを凸形状とし、こ
の凸形状キヤリアに前記チツプコンデンサを取付
けたことを特徴とするマイクロ波集積回路。
In a microwave integrated circuit configured by attaching a dielectric substrate and a chip capacitor to a carrier,
A microwave integrated circuit characterized in that a through-hole is formed in the dielectric substrate, the carrier directly under the through-hole has a convex shape, and the chip capacitor is attached to the convex-shaped carrier.
JP2404590U 1990-03-08 1990-03-08 Pending JPH03115407U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2404590U JPH03115407U (en) 1990-03-08 1990-03-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2404590U JPH03115407U (en) 1990-03-08 1990-03-08

Publications (1)

Publication Number Publication Date
JPH03115407U true JPH03115407U (en) 1991-11-28

Family

ID=31527023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2404590U Pending JPH03115407U (en) 1990-03-08 1990-03-08

Country Status (1)

Country Link
JP (1) JPH03115407U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012109502A (en) * 2010-11-19 2012-06-07 Toshiba Corp High-frequency circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012109502A (en) * 2010-11-19 2012-06-07 Toshiba Corp High-frequency circuit

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