JPH036839U - - Google Patents

Info

Publication number
JPH036839U
JPH036839U JP6650489U JP6650489U JPH036839U JP H036839 U JPH036839 U JP H036839U JP 6650489 U JP6650489 U JP 6650489U JP 6650489 U JP6650489 U JP 6650489U JP H036839 U JPH036839 U JP H036839U
Authority
JP
Japan
Prior art keywords
lead
integrated circuit
semiconductor integrated
semiconductor device
shape memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6650489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6650489U priority Critical patent/JPH036839U/ja
Publication of JPH036839U publication Critical patent/JPH036839U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a、同図bは本考案の半導体装置用パツ
ケージの一実施例を示す縦断面図、第1図bは同
図aのA部詳細を示す部分断面図、第2図は従来
の半導体装置用パツケージを示す縦断面図である
。 1……キヤツプ、2……パツケージ、3……半
導体集積回路、4……リード、5…形状記憶合金
、6……めつき層。
1a and 1b are vertical cross-sectional views showing one embodiment of the semiconductor device package of the present invention, FIG. 1b is a partial cross-sectional view showing details of section A in FIG. FIG. 2 is a longitudinal cross-sectional view showing a package for a semiconductor device. 1...Cap, 2...Package, 3...Semiconductor integrated circuit, 4...Lead, 5...Shape memory alloy, 6...Plating layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体集積回路を実装すると共に前記半導体集
積回路の電気的接合を行うリードを備えた半導体
装置用パツケージにおいて、形状記憶合金よりな
る前記リードを備えたことを特徴とする半導体装
置用パツケージ。
What is claimed is: 1. A semiconductor device package comprising a lead for mounting a semiconductor integrated circuit and electrically connecting the semiconductor integrated circuit, characterized in that the lead is made of a shape memory alloy.
JP6650489U 1989-06-06 1989-06-06 Pending JPH036839U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6650489U JPH036839U (en) 1989-06-06 1989-06-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6650489U JPH036839U (en) 1989-06-06 1989-06-06

Publications (1)

Publication Number Publication Date
JPH036839U true JPH036839U (en) 1991-01-23

Family

ID=31599288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6650489U Pending JPH036839U (en) 1989-06-06 1989-06-06

Country Status (1)

Country Link
JP (1) JPH036839U (en)

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