JPH03113927A - Digital signal repeater - Google Patents

Digital signal repeater

Info

Publication number
JPH03113927A
JPH03113927A JP25126089A JP25126089A JPH03113927A JP H03113927 A JPH03113927 A JP H03113927A JP 25126089 A JP25126089 A JP 25126089A JP 25126089 A JP25126089 A JP 25126089A JP H03113927 A JPH03113927 A JP H03113927A
Authority
JP
Japan
Prior art keywords
low level
circuit
circuits
low
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25126089A
Other languages
Japanese (ja)
Inventor
Katsuhiko Kurosawa
黒沢 勝彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25126089A priority Critical patent/JPH03113927A/en
Publication of JPH03113927A publication Critical patent/JPH03113927A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To move a low level signal between high level signals over circuit sections by linking the switching circuits of low level signals over plural circuits in a low level signal extracting and inserting means of a device multiplexing and relaying the low level signal. CONSTITUTION:A switching circuit G (H, I) is provided in common on a demultiplex circuit A (B, C) and a multiplex circuit D (E, F), a low level signal demultiplexed by one of the demultiplex circuits A, B, C is given to a low level signal external device J or a desired multiplex circuit and low level signals of the number equal to the number of the low level signals given to the external device J are given to desired multiplex circuits. High definition digital signals 1, 2, 3 are demultiplexed into low level signals 7, 8, 9 respectively by the demultiplex circuits A, B, C. The switching circuits G, H, I apply the transmission of the low level signals to the low level signal external device J and the insertion of the signal to the low level signal external device J. Furthermore, the switching circuits G, H, I replace the low level signals simultaneously. The replaced low level signals 10, 11, 12 are multiplexed with high level digital signals, 4, 5, 6 respectively by the multiplex circuits D, E, F and transmitted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、低位信号を同期多重して生成される多重信号
を中継伝送する中継装置に利用する。特に、低位信号の
外部への送出、外部からの挿入および入換手段に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is applied to a relay device that relays and transmits multiplexed signals generated by synchronously multiplexing low-level signals. In particular, it relates to means for transmitting low-level signals to the outside, inserting them from the outside, and exchanging them.

〔概要〕〔overview〕

本発明は、低位信号を多重化して中継する装置の低位信
号の抽出および挿入手段において、低位信号の切替回路
を複数の回路にまたがって連結することにより、 高位信号間での低位信号の移動が回路の区分を越えて行
えるようにしたものである。
The present invention provides low-level signal extraction and insertion means for a device that multiplexes and relays low-level signals, by connecting low-level signal switching circuits across a plurality of circuits, thereby preventing the movement of low-level signals between high-level signals. This allows the process to be performed across circuit categories.

〔従来の技術〕[Conventional technology]

従来、この種のディジタル信号中継装置では、同期多重
された高位ディジタル信号を複数個の低位ディジタル信
号に分離し、その低位ディジタル信号の一部を外部へ送
出および外部から挿入する手段を有していた。
Conventionally, this type of digital signal relay device has a means for separating a synchronously multiplexed high-order digital signal into a plurality of low-order digital signals, and sending a portion of the low-order digital signals to the outside and inserting a portion of the low-order digital signals from the outside. Ta.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来例では、多重された高位信号が複数本存
在しているときに高位信号間での低位信号の移動ができ
ない欠点があった。
Such a conventional example has a drawback that when a plurality of multiplexed high-level signals exist, a low-level signal cannot be moved between the high-level signals.

本発明は、このような欠点を除去するもので、高位信号
間で低位信号の移動が行える切替手段を有するディジタ
ル信号中継装置を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention aims to eliminate such drawbacks, and aims to provide a digital signal repeater having switching means that can move low-level signals between high-level signals.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、1個の高位信号を複数個の低位信号に分離す
る分離回路の複数個と、この分離回路に対応して設けら
れ、この分離回路で分離された低位信号と等しい個数の
低位信号を多重して1個の高位信号を生成する多重回路
と、上記分離回路と上記多重回路との間の通路に挿入さ
れた切替回路とを備えたディジタル信号中継装置におい
て、上記切替回路は、上記複数個の分離回路および上記
複数個の多重回路に対応して共通に1個設けられ上記分
離回路のひとつで分離された低位信号を所望の多重回路
または外部装置に与え、またこの外部装置に与えた低位
信号と等しい個数の低位信号を所望の多重回路に与える
構成であることを備えたことを特徴とする。
The present invention includes a plurality of separation circuits that separate one high-order signal into a plurality of low-order signals, and a plurality of low-order signals provided corresponding to the separation circuits, the number of which is equal to the number of low-order signals separated by the separation circuit. In the digital signal relay device, the switching circuit includes a multiplexing circuit that multiplexes the signals to generate one high-level signal, and a switching circuit inserted in a path between the separation circuit and the multiplexing circuit, the switching circuit comprising: One circuit is commonly provided corresponding to the plurality of separation circuits and the plurality of multiplexing circuits, and the low-level signal separated by one of the separation circuits is applied to a desired multiplexing circuit or an external device, and is also applied to the external device. The present invention is characterized in that it is configured to provide a desired multiplex circuit with the same number of low-order signals as the low-order signals received.

〔作用〕[Effect]

分離された低位信号は切替回路を経由して外部装置へま
た所望の多重回路に与えられる。また、外部装置からの
低位信号も切替回路を経由して所望の多重回路に与えら
れる。このときに、分離回路が対向する多重回路以外の
多重回路に低位信号の移動を行うことができる。
The separated low level signals are provided to external devices and to desired multiplex circuits via switching circuits. Furthermore, a low level signal from an external device is also given to a desired multiplex circuit via the switching circuit. At this time, the low-level signal can be moved to a multiplex circuit other than the multiplex circuit that the separation circuit faces.

〔実施例〕〔Example〕

以下、本発明の一実施例について図面を参照して説明す
る。
An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの実施例のブロック構成図である。FIG. 1 is a block diagram of this embodiment.

この実施例は、第1図に示すように、1個の高位信号を
複数個の低位信号に分離する分離回路A。
As shown in FIG. 1, this embodiment is a separation circuit A that separates one high-level signal into a plurality of low-level signals.

B、Cと、この分離回路A、  B、  Cに対応して
設けられ、この分離回路A、B、Cで分離された低位信
号と等しい個数の低位信号を多重して1個の高位信号を
生成する多重回路り、 E、 Fと、分離回路A、B、
Cと多重回路り、E、Fとの間の通路に挿入された切替
回路G、H,Iとを備え、さらに、本発明の特徴とする
手段として、切替回路G、 H,Iは、分離回路A、 
 B、 Cおよび多重回路り、 E、 Fに対応して共
通に1個設けられ、分離回路A、 B、 Cのひとつで
分離された低位信号を多重回路り、 E、 Fのうちの
所望の多重回路または外部装置である低位信号外部装置
Jに与え、またこの外部装置に与えた低位信号と等しい
個数の低位信号を多重回路り、  E、  Fのうちの
所望の多重回路に与える構成である。
B, C, and the separation circuits A, B, and C are provided correspondingly, and the same number of low-order signals as the low-order signals separated by the separation circuits A, B, and C are multiplexed to produce one high-order signal. The generated multiplex circuits E, F, and separation circuits A, B,
The switching circuits G, H, and I are inserted in the path between C and the multiplex circuits E and F. circuit A,
One common circuit is provided corresponding to E and F, and the low level signal separated by one of the separation circuits A, B and C is multiplexed to the desired one of E and F. A low-level signal is given to an external device J, which is a multiplex circuit or an external device, and a number of low-level signals equal to the low-level signals given to this external device are given to a desired multiplex circuit among E and F. .

次に、この実施例の動作を説明する。Next, the operation of this embodiment will be explained.

高位ディジタル信号1.2および3は分離回路A、Bお
よびCでそれぞれ低位信号7.8および9に分離される
。これらの低位信号につき切替回路G、HおよびIで低
位信号外部装置Jへの送出および低位信号外部装置Jか
らの挿入を行う。また、切替回路G、HおよびIで低位
信号の入れ替えも同時に行う。これらの切り替えた低位
信号1o、11および12は多重回路DSEおよびFで
高位ディジタル信号4.5および6にそれぞれ多重され
て伝送される。
High-order digital signals 1.2 and 3 are separated into low-order signals 7.8 and 9 by separation circuits A, B and C, respectively. These low-level signals are sent to the low-level signal external device J and inserted from the low-level signal external device J by switching circuits G, H, and I. Furthermore, switching circuits G, H, and I also perform switching of low-level signals at the same time. These switched low level signals 1o, 11 and 12 are multiplexed into high level digital signals 4.5 and 6 by multiplex circuits DSE and F, respectively, and transmitted.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように、低位ディジタル信号の
切替回路を連結することで、高位信号間での低位信号の
移動が行えかつ低位信号の外部への送出および挿入が行
えるので、回線の利用効率が良くなる効果がある。
As explained above, the present invention enables the movement of low-level signals between high-level signals and the sending and insertion of low-level signals to the outside by connecting switching circuits for low-level digital signals. It has the effect of improving efficiency.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明実施例の構成を示すブロック構成図。 第2図は、従来例の構成を示すブロック構成図。 A、B、C5KSL・・・分離回路、D、E、F。 M、N・・・多重回路、G、H,I、O,P・・・切替
回路、J・・・低位信号外部装置。
FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block configuration diagram showing the configuration of a conventional example. A, B, C5KSL...separation circuit, D, E, F. M, N...Multiple circuit, G, H, I, O, P...Switching circuit, J...Low level signal external device.

Claims (1)

【特許請求の範囲】 1、1個の高位信号を複数個の低位信号に分離する分離
回路の複数個と、この分離回路に対応して設けられ、こ
の分離回路で分離された低位信号と等しい個数の低位信
号を多重して1個の高位信号を生成する多重回路と、上
記分離回路と上記多重回路との間の通路に挿入された切
替回路とを備えたディジタル信号中継装置において、 上記切替回路は、上記複数個の分離回路および上記複数
個の多重回路に対応して共通に1個設けられ、上記分離
回路のひとつで分離された低位信号を所望の多重回路ま
たは外部装置に与え、またこの外部装置に与えた低位信
号と等しい個数の低位信号を所望の多重回路に与える構
成であることを特徴とするディジタル信号中継装置。
[Claims] 1. A plurality of separation circuits that separate one high-order signal into a plurality of low-order signals, and a signal that is provided corresponding to the separation circuit and is equal to the low-order signal separated by the separation circuit. A digital signal relay device comprising: a multiplexing circuit that multiplexes a number of low-level signals to generate one high-level signal; and a switching circuit inserted in a path between the separating circuit and the multiplexing circuit, One circuit is commonly provided corresponding to the plurality of separation circuits and the plurality of multiplexing circuits, and provides a low-level signal separated by one of the separation circuits to a desired multiplexing circuit or an external device. A digital signal relay device characterized in that it is configured to provide a desired multiplex circuit with the same number of low-order signals as the low-order signals given to the external device.
JP25126089A 1989-09-27 1989-09-27 Digital signal repeater Pending JPH03113927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25126089A JPH03113927A (en) 1989-09-27 1989-09-27 Digital signal repeater

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25126089A JPH03113927A (en) 1989-09-27 1989-09-27 Digital signal repeater

Publications (1)

Publication Number Publication Date
JPH03113927A true JPH03113927A (en) 1991-05-15

Family

ID=17220134

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25126089A Pending JPH03113927A (en) 1989-09-27 1989-09-27 Digital signal repeater

Country Status (1)

Country Link
JP (1) JPH03113927A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04276930A (en) * 1990-12-20 1992-10-02 Hughes Aircraft Co Daisy chain multiplexer
JP2008035625A (en) * 2006-07-28 2008-02-14 Somar Corp Insulation device for power, manufacturing method therefor, and film for insulation
JP2009005495A (en) * 2007-06-21 2009-01-08 Mitsubishi Electric Corp Electrical device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04276930A (en) * 1990-12-20 1992-10-02 Hughes Aircraft Co Daisy chain multiplexer
JP2555241B2 (en) * 1990-12-20 1996-11-20 エイチイー・ホールディングス・インコーポレーテッド・ディービーエー・ヒューズ・エレクトロニクス Daisy chain multiplexer
JP2008035625A (en) * 2006-07-28 2008-02-14 Somar Corp Insulation device for power, manufacturing method therefor, and film for insulation
JP2009005495A (en) * 2007-06-21 2009-01-08 Mitsubishi Electric Corp Electrical device

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