JP2590896B2 - PCM signal relay circuit - Google Patents

PCM signal relay circuit

Info

Publication number
JP2590896B2
JP2590896B2 JP62178368A JP17836887A JP2590896B2 JP 2590896 B2 JP2590896 B2 JP 2590896B2 JP 62178368 A JP62178368 A JP 62178368A JP 17836887 A JP17836887 A JP 17836887A JP 2590896 B2 JP2590896 B2 JP 2590896B2
Authority
JP
Japan
Prior art keywords
signal
low
order
circuit
pcm signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62178368A
Other languages
Japanese (ja)
Other versions
JPS6422126A (en
Inventor
勝彦 黒沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP62178368A priority Critical patent/JP2590896B2/en
Publication of JPS6422126A publication Critical patent/JPS6422126A/en
Application granted granted Critical
Publication of JP2590896B2 publication Critical patent/JP2590896B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、低位PCM信号を複数個同期多重して生成さ
れたPCM多重信号を中継伝送するPCM信号中継回路に利用
する。特に、PCM信号中継回路のアラーム波及防止信号
(以下、AIS信号という。)の挿入方式に利用する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is used for a PCM signal relay circuit that relays and transmits a PCM multiplex signal generated by synchronously multiplexing a plurality of low-order PCM signals. In particular, it is used for a method of inserting an alarm propagation prevention signal (hereinafter, referred to as an AIS signal) of a PCM signal relay circuit.

〔概要〕〔Overview〕

本発明はPCM多重信号を中継伝送するPCM信号中継回路
において、 外部より挿入する低位PCM信号の有無を検出し、挿入
信号が断たれたときにこの信号断検出信号に基づいてAI
S信号を代りに挿入することにより、 外部より挿入する低位PCM信号が断たれたときに多重
して送出する高位PCM信号の中から低位PCM信号が欠落す
ることを防止し、次の中継器への伝送信号を正常な状態
に保つようにしたものである。
The present invention provides a PCM signal relay circuit that relays and transmits a PCM multiplexed signal, detects the presence or absence of a low-order PCM signal to be inserted from the outside, and when the inserted signal is cut off, detects an AI based on the signal cutoff detection signal.
By inserting the S signal instead, when the low-order PCM signal to be inserted from the outside is cut off, the low-order PCM signal is prevented from being dropped out of the high-order PCM signal that is multiplexed and transmitted, and is transmitted to the next repeater. Is maintained in a normal state.

〔従来の技術〕[Conventional technology]

第2図は従来例のPCM信号中継回路のブロック構成図
である。
FIG. 2 is a block diagram of a conventional PCM signal relay circuit.

従来、AIS挿入手段をもつPCM信号中継回路は、第2図
に示すように、同期多重された高位PCM信号aを複数の
低位PCM信号b〜eに分離し、同期監視回路2で、低位P
CM信号b〜eが同期状態であるかを監視し、同期状態で
あればそれを選択し、非同期状態であればその状態の低
位PCM信号をAIS信号に切り替える手段を有し、また、こ
のPCM信号中継回路を有する中継器に対しても小規模の
主信号処理手段を持たせるために低位PCM信号jを外部
へ送出する選択回路3および外部から低位PCM信号mを
挿入する切替回路4を有していた。
Conventionally, a PCM signal relay circuit having an AIS insertion means separates a synchronously multiplexed high-order PCM signal a into a plurality of low-order PCM signals b to e as shown in FIG.
It has means for monitoring whether the CM signals b to e are in a synchronous state, selecting the synchronous signal in the synchronous state, and switching the low-order PCM signal in that state to the AIS signal in the asynchronous state. In order to provide a small-scale main signal processing means even for a repeater having a signal relay circuit, a selection circuit 3 for sending out a low-order PCM signal j to the outside and a switching circuit 4 for inserting a low-order PCM signal m from outside are provided. Was.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかし、このような従来例のPCM信号中継回路は、外
部より低位PCM信号を挿入する場合に、その信号が断た
れたときに多重される低位PCM信号が一つ欠落すること
になり、多重したPCM信号のマーク率の変動がおこり特
に光伝送の場合電気・光変換回路と光・電気変換回路と
の間の信号伝送状態が不安定になる。また、低位PCM信
号の欠落によりその中で構成されたフレームも欠落する
ため、次の中継器で不要なアラームを発生する欠点があ
った。
However, such a conventional PCM signal relay circuit, when inserting a low-order PCM signal from the outside, one of the low-order PCM signals that are multiplexed when the signal is cut off will be missing, multiplexed The mark ratio of the PCM signal fluctuates, and particularly in the case of optical transmission, the signal transmission state between the electrical-optical converter and the optical-electrical converter becomes unstable. In addition, since the frame constituted therein is also lost due to the loss of the low-order PCM signal, an unnecessary alarm is generated in the next repeater.

本発明は上記の欠点を解決するもので、外部より挿入
する低位信号が断たれたときに多重して送出される高位
PCM信号の中の低位PCM信号の欠落を防止し、次の中継器
への伝送信号を正常な状態に保つことができるPCM信号
中継回路を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention solves the above-mentioned drawbacks, and the high-order signal multiplexed and transmitted when the low-order signal inserted from the outside is cut off.
It is an object of the present invention to provide a PCM signal relay circuit that can prevent a low-order PCM signal in a PCM signal from being lost and keep a transmission signal to a next repeater in a normal state.

〔問題点を解決するための手段〕[Means for solving the problem]

本発明は、多重化された高位PCM信号を多重分離して
複数個の低位PCM信号に分離する分離回路と、この複数
個の低位PCM信号を入力し、この複数個のうちの一つを
選択して外部に送出し低位PCM信号を一つ欠落して出力
する選択回路と、外部より入力された一つの低位PCM信
号を前記外部に送出した低位PCM信号に代えて出力する
切替回路と、この切替回路の出力する複数個の低位PCM
信号を多重して高位PCM信号として出力する多重回路
と、前記分離された低位PCM信号を監視する同期監視回
路と、アラーム波及防止信号を発生するアラーム波及防
止信号発生回路とを備え、前記切替回路は、同期監視回
路が非同期状態であると検出したときにその低位PCM信
号に代えて前記アラーム波及防止信号を出力する手段を
備えたPCM信号中継回路において、上記外部より挿入す
る低位PCM信号の有無を検出する検出回路を備え、上記
切替回路は、この検出回路の信号断検出信号に基づいて
上記外部より挿入する低位PCM信号の代りに上記アラー
ム波及防止信号を出力する手段を含むことを特徴とす
る。
The present invention provides a demultiplexing circuit that demultiplexes a multiplexed high-order PCM signal and separates the multiplexed high-order PCM signal into a plurality of low-order PCM signals, inputs the plurality of low-order PCM signals, and selects one of the plurality of low-order PCM signals. A selection circuit for transmitting one low-order PCM signal to the outside and outputting the same, and a switching circuit for outputting one low-order PCM signal input from the outside in place of the low-order PCM signal sent to the outside, Multiple low-order PCMs output by the switching circuit
A multiplexing circuit for multiplexing a signal and outputting it as a high-order PCM signal, a synchronization monitoring circuit for monitoring the separated low-order PCM signal, and an alarm-spreading-prevention signal generating circuit that generates an alarm-spreading-preventive signal; The presence or absence of the externally inserted low-order PCM signal in the PCM signal relay circuit including means for outputting the alarm propagation prevention signal in place of the low-order PCM signal when the synchronization monitoring circuit detects that the low-order PCM signal is in an asynchronous state The switching circuit includes means for outputting the alarm propagation prevention signal in place of the low-order PCM signal inserted from the outside based on the signal disconnection detection signal of the detection circuit. I do.

〔作用〕[Action]

検出回路で外部より挿入する低位PCM信号の有無を検
出する。切替回路で外部より挿入する低位PCM信号が断
たれたときに検出回路の信号断検出信号に基づいて外部
より挿入する低位PCM信号の代りにアラーム波及防止信
号を挿入して出力する。以上の動作により外部より挿入
する低位PCM信号が断たれたときに多重して送出する高
位PCM信号の中から低位PCM信号が欠落することを防止
し、次の中継器への伝送信号を正常な状態に保つことが
できる。
A detection circuit detects the presence or absence of a low-order PCM signal inserted from outside. When the low-order PCM signal inserted from the outside is cut off by the switching circuit, an alarm propagation prevention signal is inserted and output instead of the low-order PCM signal inserted from the outside based on the signal cutoff detection signal of the detection circuit. With the above operation, when the low-order PCM signal inserted from the outside is cut off, the low-order PCM signal is prevented from being dropped out of the high-order PCM signals multiplexed and transmitted, and the transmission signal to the next repeater is Can be kept in condition.

〔実施例〕〔Example〕

本発明の実施例について図面を参照して説明する。第
1図は本発明一実施例PCM信号中継回路のブロック構成
図である。第1図において、PCM信号中継回路は、図外
から4チャネルが多重された高位PCM信号aを入力し多
重信号を分離し、低位PCM信号b〜eを出力する分離回
路1と、分離回路1から低位PCM信号b〜eを入力し
て、同期状態を判定し、同期状態でない低位PCM信号が
あるときにはその信号の代りにAIS信号を挿入する指示
を行うAIS切替指示信号を出力する同期監視回路2と、
分離回路1から低位PCM信号b〜eを入力して、低位PCM
信号b〜eの一つを選択し低位PCM信号jとして外部に
送出し、低位PCM信号が一つ欠落した状態で低位PCM信号
f〜hを出力し(外部に送出しないときには低位PCM信
号iを出力する)、また挿入指示信号lを出力する選択
回路3と、AIS信号o〜rを発生するAIS発生回路5と、
選択回路f〜hおよび外部から低位PCM信号mを入力
し、同期監視回路2からのAIS切替指示信号kに従って
低位PCM信号f〜hのうちの同期外れの信号とAIS信号o
〜rのいずれか一つとを切り替えて出力し、また選択回
路3からの挿入指示信号lに従って外部に送出した低位
PCM信号jの代りに低位PCM信号mを挿入して低位PCM信
号s〜vを出力する切替回路4と、切替回路4から低位
PCM信号s〜vを入力して高位PCM信号wを図外に出力す
る多重回路6とを備える。
Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a PCM signal relay circuit according to one embodiment of the present invention. In FIG. 1, a PCM signal relay circuit includes a separating circuit 1 that receives a high-order PCM signal a in which four channels are multiplexed from outside, separates the multiplexed signal, and outputs low-order PCM signals b to e. A low-order PCM signal from b to e to determine the synchronization state, and when there is a low-order PCM signal that is not in the synchronization state, output a AIS switching instruction signal for instructing insertion of an AIS signal instead of the signal. 2 and
The low-order PCM signals b to e are input from the separation circuit 1 and
One of the signals b to e is selected and sent to the outside as a low-order PCM signal j, and the low-order PCM signals f to h are output in a state where one of the low-order PCM signals is missing. A selection circuit 3 for outputting an insertion instruction signal 1; an AIS generation circuit 5 for generating AIS signals o to r;
The low-order PCM signal m is input from the selection circuits f to h and the outside, and out of synchronization among the low-order PCM signals f to h and the AIS signal o according to the AIS switching instruction signal k from the synchronization monitoring circuit 2.
To r, and outputs the selected low-order signal.
A switching circuit 4 for inserting the low-order PCM signal m in place of the PCM signal j and outputting the low-order PCM signals s to v;
A multiplexing circuit 6 for receiving the PCM signals s to v and outputting a high-order PCM signal w out of the figure;

ここで本発明の特徴とするところは、外部より入力す
る低位PCM信号mの有無を検出し信号断検出信号nを切
替回路4に与える検出回路7を備え、切替回路4に、信
号断検出信号nに従って低位PCM信号mの代りにAIS信号
o〜rのいずれか一つを挿入して出力する手段を含むこ
とにある。
Here, a feature of the present invention is that the switching circuit 4 includes a detection circuit 7 that detects the presence or absence of a low-order PCM signal m input from the outside and supplies a signal disconnection detection signal n to the switching circuit 4. and means for inserting and outputting any one of the AIS signals o to r instead of the low-order PCM signal m according to n.

このような構成のPCM信号中継回路の動作について説
明する。第1図において、高位PCM信号aは低位PCM信号
b〜eに分離される。この低位PCM信号b〜eのいずれ
かが低位PCM信号jとして選択回路3で外部へ送出され
る。残りの低位信号f〜h(外部へ送出しないときはi
もある)は同期監視回路2のAIS切替指示信号kに従っ
て切替回路4で非同期の信号がAIS信号o〜rのいずれ
かに切り替えられる。また、選択回路2の挿入指示信号
lに従って切替回路4で外部に送出した低位PCM信号j
の代りに低位PCM信号mが挿入される。さらに、低位PCM
信号jの代りに外部より挿入する低位PCM信号mは、低
位PCM信号mが断のときに信号の有無を検出する検出回
路7の信号断検出信号nにより、AIS信号o〜rのいず
れかに切替えられる。これにより低位PCM信号s〜vの
一部信号列に信号が欠落することを防止できる。
The operation of the PCM signal relay circuit having such a configuration will be described. In FIG. 1, the high order PCM signal a is separated into low order PCM signals be. Any of the low-order PCM signals b to e is sent out to the outside by the selection circuit 3 as the low-order PCM signal j. The remaining low-level signals f to h (i.e.,
The asynchronous circuit is switched by the switching circuit 4 to one of the AIS signals o to r in accordance with the AIS switching instruction signal k of the synchronous monitoring circuit 2. Also, the low-order PCM signal j sent out by the switching circuit 4 to the outside according to the insertion instruction signal 1 of the selection circuit 2
Is inserted instead of the low-order PCM signal m. In addition, lower PCM
The low-order PCM signal m to be inserted from the outside instead of the signal j is output to one of the AIS signals o to r by the signal disconnection detection signal n of the detection circuit 7 for detecting the presence or absence of the signal when the low-order PCM signal m is disconnected. Can be switched. Thus, it is possible to prevent a signal from being lost in a part of the signal sequence of the low-order PCM signals s to v.

〔発明の効果〕 以上説明したように、本発明は、外部から挿入する低
位PCM信号の有無を検出することで、挿入信号が断たれ
たときに、多重して送出される高位PCM信号の中から低
位PCM信号が一つ欠落することを防ぐことができ、以降
の中継切への伝送信号を正常な状態に保つことができる
優れた効果がある。
[Effects of the Invention] As described above, the present invention detects the presence or absence of a low-order PCM signal to be inserted from the outside, so that when the insertion signal is cut off, the high-order PCM signal multiplexed and transmitted is detected. Thus, there is an excellent effect that one low-order PCM signal can be prevented from being lost, and the transmission signal to the subsequent relay disconnection can be kept normal.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例PCM信号中継回路のブロック
構成図。 第2図は従来例のPCM信号中継回路のブロック構成図。 1……分離回路、2……同期監視回路、3……選択回
路、4……切替回路、5……AIS発生回路、6……多重
回路、7……検出回路、a、w……高位PCM信号、b〜
i、j、m、s〜v……低位PCM信号、k……AIS切替指
示信号、l……挿入指示信号、n……検出信号、o〜r
……AIS信号。
FIG. 1 is a block diagram of a PCM signal relay circuit according to an embodiment of the present invention. FIG. 2 is a block diagram of a conventional PCM signal relay circuit. DESCRIPTION OF SYMBOLS 1 ... Separation circuit, 2 ... Synchronization monitoring circuit, 3 ... Selection circuit, 4 ... Switching circuit, 5 ... AIS generation circuit, 6 ... Multiplexing circuit, 7 ... Detection circuit, a, w ... High order PCM signal, b ~
i, j, m, s to v: low-order PCM signal, k: AIS switching instruction signal, l: insertion instruction signal, n: detection signal, or
…… AIS signal.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】多重化された高位PCM信号を多重分離して
複数個の低位PCM信号に分離する分離回路と、 この複数個の低位PCM信号を入力し、この複数個のうち
の一つを選択して外部に送出し低位PCM信号を一つ欠落
して出力する選択回路と、 外部より入力された一つの低位PCM信号を前記外部に送
出した低位PCM信号に代えて出力する切替回路と、 この切替回路が出力する複数個の低位PCM信号を多重し
て高位PCM信号として出力する多重回路と、 前記分離された低位PCM信号を監視する同期監視回路
と、 アラーム波及防止信号を発生するアラーム波及防止信号
発生回路と を備え、 前記切替回路は、同期監視回路が非同期状態であると検
出したときにその低位PCM信号に代えて前記アラーム波
及防止信号を出力する手段を備えた PCM信号中継回路において、 上記外部より挿入する低位PCM信号の有無を検出する検
出回路を備え、 上記切替回路は、この検出回路の信号断検出信号に基づ
いて上記外部より挿入する低位PCM信号の代りに上記ア
ラーム波及防止信号を出力する手段を含むことを特徴と
するPCM信号中継回路。
1. A demultiplexing circuit for demultiplexing a multiplexed high-order PCM signal to separate the plurality of low-order PCM signals into a plurality of low-order PCM signals. A selection circuit for selecting and sending out to the outside a low-order PCM signal, and a switching circuit for outputting one low-order PCM signal input from the outside in place of the low-order PCM signal sent to the outside; A multiplexing circuit that multiplexes a plurality of low-order PCM signals output from the switching circuit and outputs the multiplexed low-order PCM signals as a high-order PCM signal; a synchronization monitoring circuit that monitors the separated low-order PCM signal; and an alarm spillover that generates an alarm spillover prevention signal. Wherein the switching circuit comprises means for outputting the alarm propagation prevention signal instead of the low-order PCM signal when the synchronization monitoring circuit detects that the synchronization monitoring circuit is in an asynchronous state. , Up A detection circuit for detecting the presence or absence of a low-order PCM signal to be inserted from the outside; the switching circuit detects the alarm propagation prevention signal instead of the low-order PCM signal to be inserted from the outside based on a signal cutoff detection signal of the detection circuit. A PCM signal relay circuit comprising output means.
JP62178368A 1987-07-17 1987-07-17 PCM signal relay circuit Expired - Lifetime JP2590896B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178368A JP2590896B2 (en) 1987-07-17 1987-07-17 PCM signal relay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178368A JP2590896B2 (en) 1987-07-17 1987-07-17 PCM signal relay circuit

Publications (2)

Publication Number Publication Date
JPS6422126A JPS6422126A (en) 1989-01-25
JP2590896B2 true JP2590896B2 (en) 1997-03-12

Family

ID=16047272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178368A Expired - Lifetime JP2590896B2 (en) 1987-07-17 1987-07-17 PCM signal relay circuit

Country Status (1)

Country Link
JP (1) JP2590896B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5639655A (en) * 1979-09-07 1981-04-15 Nec Corp N-to-one stand-by switching system of radio digital transmission
JPS61263339A (en) * 1985-05-17 1986-11-21 Fujitsu Ltd Optical intermediate repeater

Also Published As

Publication number Publication date
JPS6422126A (en) 1989-01-25

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