JPH02268037A - Auxiliary signal transmission circuit - Google Patents

Abstract

PURPOSE:To miniaturize a circuit scale by applying the multiplexing of an auxiliary transmission signal to only M signal strings selected among N signal strings. CONSTITUTION:A transmission side terminal station uses a multiplexing circuit 10 to multiplex an auxiliary transmission signal 7 while synchronizing 3 transmission signals 11-13 subjected to error correction coding with the block of an error correction code and multiplexing transmission signals 21-23 are sent as a modulation output. An intermediate repeater station uses an error correction decoding circuit 11 to apply the operation of error correction coding to a signal string 31 among multiplexed input signal strings 31-33 and outputs the result as a decoding multiplexing signal 41. An auxiliary transmission signal demultiplexing/inserting circuit 12 separates an auxiliary transmission signal 81 in the multiplexing signal from the signal 41 synchronously with the block of the correction code inserted by the circuit 10 at the terminal station and inserts the new auxiliary transmission signal 82. The circuit 13 outputs a multiplexing signal 61 resulting from the demultiplex/insertion of the auxiliary transmission signal. On the other hand, input signal strings 32, 33, are sent as multiplexing signal strings 62, 63 via a delay circuit 14.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to digital multiplex transmission, and more particularly to a circuit for separating/inserting auxiliary transmission signals at intermediate relay stations.

[Conventional technology]

A block diagram of a conventional auxiliary signal transmission circuit of this type is shown in FIG. In the figure, the transmitting terminal station has a multiplexing circuit of 10A.
Transmission signals II to I encoded with N columns of error correction by
The auxiliary transmission signal 7 is multiplexed while synchronizing the error correction code block with the error correction code block, and the multiplexed transmission signal 2. ~2N is sent out as a modulated output. FIG. 4 shows an example of a multiplexed transmission signal sequence. Blocks A, -A of error correction codes and auxiliary transmission signals Bl-BN are multiplexed in each transmission signal train.

At the intermediate relay station, multiplexed input signal sequences 31 to
Error correction decoding circuit 11A+ for 3N.

.about.11A8 performs the error correction decoding operation, and the decoded N-column multiplexed signal 4. Output ~4N.

The auxiliary transmission signal separation/insertion circuit 12A separates the multiplexed signal 4.
By synchronizing .about.4N with the error correction code block inserted by the multiplexing circuit 10A of the terminal station, the auxiliary transmission signal 8I in the multiplexed signal is separated and a new auxiliary transmission signal 82 is inserted.

The error correction encoding circuits 13A, ~13A9 perform error correction encoding on the multiplexed signals 51~5N after the auxiliary transmission signals have been separated/inserted, and convert the error correction encoded multiplexed signals 6I~6N into error correction encoded multiplexed signals 6I~6N. Send as modulated output.

(Problem to be Solved by the Invention) In the conventional auxiliary signal transmission circuit described above, since the auxiliary transmission signal is separated/inserted in the entire transmission signal train at the intermediate relay station, error correction decoding and encoding are not possible. must be performed for the entire transmission signal train.Therefore, 1. there is a problem that the circuit configurations of the error correction decoding circuit and the error correction encoding circuit become large-scale, and the entire circuit becomes large-scale.

An object of the present invention is to provide an auxiliary signal transmission circuit having a small circuit scale.

[Means for Solving the Problems] The auxiliary signal transmission circuit of the present invention has N columns (N
22) is provided with a multiplexing circuit for multiplexing the auxiliary transmission signal onto M sequences (M<N) of signal sequences selected from the signal sequences of 22).

The intermediate relay station also includes an error correction decoding circuit that performs error correction decoding on the M signal string in which the auxiliary transmission signal is multiplexed, and an error correction decoding circuit that performs error correction decoding on the M signal string in which the auxiliary transmission signal is multiplexed, and an auxiliary transmission signal separation/insertion circuit that separates the auxiliary transmission signal and inserts a new auxiliary transmission signal; an error correction encoding circuit that performs error correction encoding in the M signal string; and an error correction encoding circuit that performs error correction coding on the M signal string; and a delay circuit synchronized with the M signal train.

[Effect]

With this configuration, error correction decoding and error correction coding at the intermediate relay station need only be performed for M signal sequences selected from N signal sequences, and the error correction decoding circuit and error correction encoding circuit The scale of the circuit can be reduced, and the entire circuit can be configured on a small scale.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. Note that here, to simplify the explanation, the signal sequence N is
=3. An example is shown in which the selected signal example M for multiplexing the auxiliary transmission signal is M=1.

At the transmitting end station, the multiplexing circuit 10 transmits three columns of error correction encoded transmission signals II to 1. The auxiliary transmission signal 7 is multiplexed while being synchronized with the error correction code block, and the multiplexed transmission signal 2. ~23 is sent out as a modulated output.

FIG. 2 shows a multiplexed transmission signal train at the transmitting end station. Blocks A, ~A3 of the error correction code are 2. ~2.
The auxiliary transmission signals B, ~B are multiplexed into each transmission signal train of
3 is multiplexed into only one transmission signal train 21.

At the intermediate relay station, the multiplexed input signal sequence 3. ~
Of the signals 33, the signal string 31 is subjected to error correction decoding calculation by the error correction decoding circuit 11 as in the conventional case, and is outputted as one decoded string of multiplexed signals 4.

The auxiliary transmission signal separation/insertion circuit 12 synchronizes the multiplexed signal 4I with the error correction code block inserted by the multiplexing circuit 10 of the terminal station, thereby separating the auxiliary transmission signals 8. Separate the new auxiliary transmission signal 8. Insert.

The error correction encoding circuit 13 converts the multiplexed signal 6. after the auxiliary transmission signal has been separated/inserted. is sent out as a modulated output.

On the other hand, the input signal strings 3□, 33 at the intermediate relay station are given a delay time by the delay circuit 14, and as a result, the output multiplexed signal strings 6□, 6. is the multiplexed signal sequence 6. has the same synchronization block position of the error correction code as in the multiplexed signal sequence 6. Similarly, it is sent out as a modulated output.

In addition, in the present invention, N may be 4 or more (, M
It goes without saying that N may be 2 or more as long as it is smaller than N.

〔Effect of the invention〕

As explained above, the present invention performs multiplexing of auxiliary transmission signals only on selected N signal sequences among N signal sequences, so that error correction decoding and error correction coding at intermediate relay stations is performed. need only be executed for M signal sequences,
This has the effect that the scale of the error correction decoding circuit and the error correction encoding circuit can be reduced, and the entire circuit can be configured on a small scale.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a multiplexed transmission signal train in the circuit of FIG. 1, and FIG.
This figure is a block diagram of a conventional auxiliary transmission signal circuit, and FIG. 4 is a diagram showing a multiplexed transmission signal train in the circuit of FIG. 3. 11~IN...Error correction coded transmission signal sequence at the transmitting terminal station, 2□~2N...Multiplexed transmission signal sequence at the transmitting terminal station, 3,~3N...Input signal sequence at the intermediate relay station Multiplexed signal sequence, 4I to 4N... Multiplexed signal sequence subjected to error correction decoding at intermediate relay station, 5I to 58...
- Multiplexed signal sequence after auxiliary transmission signal separation/insertion at the intermediate relay station, 6I to 6M... Multiplexed signal sequence subjected to error correction encoding at the intermediate relay station, 7: auxiliary transmission signal to be multiplexed , 8. ...Separated auxiliary transmission signal, 8□
... Auxiliary transmission signal to be inserted, 10, IOA... Multiplexing circuit, 11. IIA, ~11AN...Error correction decoding circuit, auxiliary transmission signal separation/insertion circuit, 1 13A,...Error correction encoding circuit, A, -A,...Error correction code professional B, -B ,...Auxiliary transmission signal. 12, 12A... 3.13A1 to 14...Delay circuit, ivy,

Claims (1)

[Claims] 1. The transmitting terminal station is equipped with a multiplexing circuit that multiplexes the auxiliary transmission signal into M sequences (M<N) of signal sequences selected from N sequences (N≧2) of signal sequences; includes an error correction decoding circuit that performs error correction decoding on the M signal strings in which the auxiliary transmission signals are multiplexed; and an error correction decoding circuit that separates the auxiliary transmission signals in the M signal strings in synchronization with blocks of error correction codes. and an auxiliary transmission signal separation/insertion circuit for inserting a new auxiliary transmission signal;
An auxiliary signal transmission circuit comprising: an error correction encoding circuit that performs error correction encoding in an M signal sequence; and a delay circuit that synchronizes signal sequences other than the M signal sequence with the M signal sequence.