JPH02206242A - Time division multiplex transmission system - Google Patents
Time division multiplex transmission systemInfo
- Publication number
- JPH02206242A JPH02206242A JP8925389A JP2538989A JPH02206242A JP H02206242 A JPH02206242 A JP H02206242A JP 8925389 A JP8925389 A JP 8925389A JP 2538989 A JP2538989 A JP 2538989A JP H02206242 A JPH02206242 A JP H02206242A
- Authority
- JP
- Japan
- Prior art keywords
- rule violation
- signal
- code
- circuit
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 title claims abstract description 26
- 230000001360 synchronised effect Effects 0.000 claims abstract description 7
- 108010076504 Protein Sorting Signals Proteins 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 8
- 238000001514 detection method Methods 0.000 abstract description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 230000008030 elimination Effects 0.000 abstract 1
- 238000003379 elimination reaction Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Landscapes
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はディジタル信号の伝送に利用する。特に、DM
I符号化された複数の信号系列を時分割多重化して伝送
する時分割多重伝送方式に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention is used in the transmission of digital signals. In particular, DM
The present invention relates to a time division multiplex transmission method that time division multiplexes and transmits a plurality of I-encoded signal sequences.
本発明は、DMI符号化された複数の信号系列を時分割
多重化して伝送する時分割多重伝送方式少なくともひと
つの信号系列に符号則違反を重畳することにより、
送信側では複数の信号系列を原信号に逆変換することな
くそのまま多重化し、受信側では多重化された信号をそ
のまま多重分離できるようにするものである。The present invention provides a time-division multiplexing transmission method in which multiple DMI-encoded signal sequences are time-division multiplexed and transmitted. By superimposing a coding rule violation on at least one signal sequence, the transmitting side can transmit multiple signal sequences as original signals. It multiplexes signals without inverse conversion, and allows the receiving side to demultiplex the multiplexed signals as they are.
第4図は従来例時分割多重伝送方式における信号波形を
示す。ここで第4図(a)、(b)は多重化前の個々の
信号系列B1〜B、を示し、第4図(C)は多重化され
た信号系列Bを示す。FIG. 4 shows signal waveforms in a conventional time division multiplex transmission system. Here, FIGS. 4(a) and 4(b) show individual signal sequences B1 to B before multiplexing, and FIG. 4(C) shows multiplexed signal sequence B.
従来から、周波数同期のとれた複数n系列のディジタル
信号を多重化するために、n個のディジタル信号を1ビ
ツト毎に配置して多重化する方式が用いられている。こ
の方式はビットインターリーブ方式と呼ばれている。こ
の方式では、多重分離する場合にn個のディジタル信号
を識別できるように、適当な間隔で同期パルスを配置し
てフレームを構成することが一般的である。Conventionally, in order to multiplex a plurality of n series of digital signals that are synchronized in frequency, a method has been used in which n digital signals are arranged bit by bit and multiplexed. This method is called a bit interleave method. In this method, a frame is generally constructed by arranging synchronization pulses at appropriate intervals so that n digital signals can be identified during demultiplexing.
また、多重化した信号を伝送するためには、ディジタル
伝送における安定な伝送品質を確保するため、適当な伝
送路符号に変換することが一般的である。Furthermore, in order to transmit multiplexed signals, it is common to convert them into appropriate transmission line codes in order to ensure stable transmission quality in digital transmission.
この一方で、ディジタル通信網を柔軟に構成するために
は、多重分離などのディジタル信号処理を行った信号を
直接に中継伝送路に送出できることが要求されている。On the other hand, in order to flexibly configure a digital communication network, it is required to be able to directly send signals that have undergone digital signal processing such as demultiplexing to a relay transmission path.
このためには、伝送路符号に変換した信号であっても、
多重分離などの信号処理ができることが望ましい。For this purpose, even if the signal is converted to a transmission path code,
It is desirable to be able to perform signal processing such as demultiplexing.
しかし、従来の時分割多重伝送方式では、伝送路符号変
換の前に多重化処理が必要であるため、多重化処理前の
符号化された信号に逆変換を施して原信号に戻し、それ
からフレームパルスを時分割に重畳しない限り、受信側
では多重分離ができない欠点があった。However, in conventional time division multiplexing transmission systems, multiplexing processing is required before transmission line code conversion, so the coded signal before multiplexing processing is inversely transformed back to the original signal, and then the frame The drawback is that unless the pulses are time-divisionally superimposed, demultiplexing cannot be performed on the receiving side.
本発明の時分割多重伝送方式は、送信側装置に、複数の
信号系列の少なくともひとつにあらかじめ定めた形態の
符号則違反を重畳する符号則違反重畳回路を備え、受信
側回路に、符号則違反が重畳された信号を検出してその
信号に同期したタイミング信号を多重分離回路に主力す
る符号則違反検出回路と、この符号則違反が重畳された
信号から上記あらかじめ定めた形態の符号則違反をその
逆論理にしたがって除去する符号則違反除去回路とを備
えたことを特徴とする。In the time division multiplex transmission system of the present invention, a transmitting side device is equipped with a coding rule violation superimposition circuit that superimposes a coding rule violation in a predetermined form on at least one of a plurality of signal sequences; a coding rule violation detection circuit that detects a signal on which a coding rule violation is superimposed and feeds a timing signal synchronized with the signal to a demultiplexing circuit; The present invention is characterized by comprising a code rule violation removal circuit that removes the code according to the reverse logic.
ひとつの信号系列に符号則違反を与えることにより、特
別の同期信号を挿入することなしに複数の信号系列を多
重化できる。また、DMI符号化された信号系列をその
まま(原信号に逆変換することなく)伝送路符号として
使用できるので、受信側では、受信信号をそのまま直接
に多重分離できる。また、符号則違反の形態が定まって
いるので、受信側で容易に原符骨を回復できる。By giving a coding rule violation to one signal sequence, multiple signal sequences can be multiplexed without inserting a special synchronization signal. Furthermore, since the DMI encoded signal sequence can be used as a transmission line code as it is (without being inversely converted to the original signal), the receiving side can directly demultiplex the received signal as it is. Furthermore, since the form of code rule violation is determined, the original code can be easily recovered on the receiving side.
第1図は本発明実施例時分割多重伝送装置のブロック構
成図である。FIG. 1 is a block diagram of a time division multiplex transmission apparatus according to an embodiment of the present invention.
この装置は、伝送路2を介して接続された送信側装置1
および受信側装置3を備え、送信側装置3はDME符号
化された複数nの信号系列を時分割多重化する多重化回
路12を含み、受信側装置3は、送信側装置1から送信
された信号を受信して多重分離する多重分離回路31を
含む。This device is a transmitter device 1 connected via a transmission path 2.
and a receiving device 3 , the transmitting device 3 includes a multiplexing circuit 12 that time-division multiplexes a plurality of n DME-encoded signal sequences, and the receiving device 3 receives signals transmitted from the transmitting device 1 . It includes a demultiplexing circuit 31 that receives and demultiplexes signals.
ここで本実施例の特徴とするところは、送信側装置1が
、複数の信号系列の少なくともひとつにあらかじめ定め
た形態の符号則違反を重畳する符号則違反重畳回路11
を含み、受信側回路3が、符号則違反が重畳された信号
を検出してその信号に同期したタイミング信号を多重分
離回路31に出力する符号則違反検出回路32と、この
符号則違反が重畳された信号から符号則違反重畳回路1
1が用いた形態の逆論理にしたがって符号則違反を除去
する符号則違反除去回路33とを含むことにある。Here, the feature of this embodiment is that the transmitting side device 1 uses a coding rule violation superimposition circuit 11 that superimposes a predetermined form of coding rule violation on at least one of a plurality of signal sequences.
a coding rule violation detection circuit 32 in which the receiving side circuit 3 detects a signal on which a coding rule violation is superimposed and outputs a timing signal synchronized with the signal to the demultiplexing circuit 31; Sign rule violation superimposition circuit 1
The present invention also includes a coding rule violation removal circuit 33 that removes coding rule violations according to the inverse logic of the form used in No. 1.
第2図は本実施例における信号波形を示し、(a)ない
しくC)は多重化前の個々のディジタル信号を示し、(
d)は多重化された信号を示す。FIG. 2 shows signal waveforms in this example, where (a) to C) show individual digital signals before multiplexing, and (
d) shows a multiplexed signal.
互いに同期したn系列のDMI符号系列は、第2図(a
)に示す1番目の系列だけが、符号則違反重畳回路11
により、一定周期の符号則違反が重畳される。符号則違
反が重畳された1番目の系列と符号則違反が重畳されて
いない他のn−1個の信号系列A2〜A、、は、多重化
回路12により、第2図(6)に示すような多重化され
た信号系列Aに変換される。The n DMI code sequences synchronized with each other are shown in Figure 2 (a
) is the only sequence shown in the sign rule violation superimposition circuit 11.
As a result, violations of the sign rule at a constant period are superimposed. The first sequence in which the coding rule violation is superimposed and the other n-1 signal sequences A2 to A2 in which the coding rule violation is not superimposed are processed by the multiplexing circuit 12 as shown in FIG. 2 (6). It is converted into a multiplexed signal sequence A as shown in FIG.
伝送路2を経由して受信側装置3に伝送された信号系列
Aは、多重分離回路31によってn個の信号系列に分離
される。符号則違反検出回路32は、送信側で重畳され
た一定周期の符号則違反を検出し、その符号則違反が重
畳された信号系列が1番目のDMr符号として出力され
るように、多重分離回路31のクロック信号のタイミン
グを制御する。The signal sequence A transmitted to the receiving side device 3 via the transmission path 2 is separated into n signal sequences by the demultiplexing circuit 31. The coding rule violation detection circuit 32 detects a fixed period coding rule violation superimposed on the transmitting side, and demultiplexes the signal sequence so that the signal sequence on which the coding rule violation is superimposed is output as the first DMr code. The timing of the clock signal of 31 is controlled.
符号則違反除去回路33は、1番目のDMI符号系列に
ついて、送信側で重畳された符号則違反を除去して原信
号を再生する。The coding rule violation removal circuit 33 removes the coding rule violation superimposed on the transmitting side for the first DMI code sequence and reproduces the original signal.
第3図は符号則違反重畳回路11および符号則違反除去
回路33の用いる符号則違反の状態遷移図を示す。FIG. 3 shows a state transition diagram of a code rule violation used by the code rule violation superimposition circuit 11 and the code rule violation removal circuit 33.
以上説明したように、本発明の時分割多重伝送方式は、
1個のDMI符号系列に周期的に符号則違反を与えるこ
とにより、多重化された信号にフレームパルスを重畳す
る。これにより、伝送路符号としてDMI符号に変換さ
れたn個の互いに同期した信号について、原信号に逆変
換することなく多重化および多重分離できる効果がある
。さらに、符号則違反の形態が定まっているので、受信
側で容易に原符骨を回復できる。また、伝送路符号とし
てDME符号を用いているので、符号化さた後に符号則
違反を重畳すること、および符号則違反を検出すること
は容易であり、比較的回路規模の小さい回路で実現でき
る。As explained above, the time division multiplex transmission method of the present invention is
A frame pulse is superimposed on a multiplexed signal by periodically giving a coding rule violation to one DMI code sequence. This has the effect that n mutually synchronized signals converted into DMI codes as transmission path codes can be multiplexed and demultiplexed without being inversely converted to original signals. Furthermore, since the form of code rule violation is determined, the original code can be easily recovered on the receiving side. In addition, since DME codes are used as transmission path codes, it is easy to superimpose coding rule violations after encoding and to detect coding rule violations, and this can be achieved with a relatively small circuit. .
第1図は本発明実施例時分割多重伝送装置のブロック構
成図。
第2図は信号波形を示す図。
第3図は符号則違反の状態遷移図。
第4図は従来例方式における信号波形を示す図。FIG. 1 is a block diagram of a time division multiplex transmission apparatus according to an embodiment of the present invention. FIG. 2 is a diagram showing signal waveforms. FIG. 3 is a state transition diagram of code rule violation. FIG. 4 is a diagram showing signal waveforms in the conventional method.
Claims (1)
装置を備え、 上記送信側装置はDMI符号化された複数の信号系列を
時分割多重化する多重化回路を含み、上記受信側装置は
、上記送信側装置から送信された信号を受信して多重分
離する多重分離回路を含む 時分割多重伝送方式において、 上記送信側装置は、上記複数の信号系列の少なくともひ
とつにあらかじめ定めた形態の符号則違反を重畳する符
号則違反重畳回路を含み、 上記受信側回路は、符号則違反が重畳された信号を検出
してその信号に同期したタイミング信号を上記多重分離
回路に出力する符号則違反検出回路と、この符号則違反
が重畳された信号から上記あらかじめ定めた形態の符号
則違反をその逆論理にしたがって除去する符号則違反除
去回路とを含む ことを特徴とする時分割多重伝送方式。[Claims] 1. A transmitting side device and a receiving side device connected via a transmission path, the transmitting side device including a multiplexing circuit that time-division multiplexes a plurality of DMI encoded signal sequences. In a time division multiplex transmission system, the receiving device includes a demultiplexing circuit that receives and demultiplexes signals transmitted from the transmitting device, and the transmitting device transmits at least one of the plurality of signal sequences. includes a coding rule violation superimposition circuit that superimposes a coding rule violation in a predetermined form on the signal, and the receiving side circuit detects the signal on which the coding rule violation is superimposed and transmits a timing signal synchronized with the signal to the demultiplexing circuit. and a coding rule violation removal circuit that removes the predetermined form of coding rule violation from the signal on which the coding rule violation is superimposed, according to its inverse logic. Time division multiplex transmission method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8925389A JPH02206242A (en) | 1989-02-03 | 1989-02-03 | Time division multiplex transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8925389A JPH02206242A (en) | 1989-02-03 | 1989-02-03 | Time division multiplex transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02206242A true JPH02206242A (en) | 1990-08-16 |
Family
ID=12164524
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8925389A Pending JPH02206242A (en) | 1989-02-03 | 1989-02-03 | Time division multiplex transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02206242A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05268183A (en) * | 1992-03-23 | 1993-10-15 | Nippon Telegr & Teleph Corp <Ntt> | Multiplexer circuit and demultiplexer circuit |
JPH08186554A (en) * | 1994-12-27 | 1996-07-16 | Nec Corp | Time division multiplex transmitter and decoding circuit |
-
1989
- 1989-02-03 JP JP8925389A patent/JPH02206242A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05268183A (en) * | 1992-03-23 | 1993-10-15 | Nippon Telegr & Teleph Corp <Ntt> | Multiplexer circuit and demultiplexer circuit |
JPH08186554A (en) * | 1994-12-27 | 1996-07-16 | Nec Corp | Time division multiplex transmitter and decoding circuit |
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