JPH03113554A - Data transfer system - Google Patents

Abstract

PURPOSE:To prevent the deterioration of the processing capability of a microprocessor by providing a 2nd storage device to duplicate the data transfer area of a 1st storage device to use both data transfer areas of the 1st storage device by switching a bus switch and using no microprocessor for transfer of data. CONSTITUTION:The bus switch 40 is actuated when a serial communication port 30 confirms the end of transfer of a single telegram. Thus the transfer data areas 22A and 22B of the 1st storage device 20 are switched with each other. A microprocessor MPU 10 has an access to the area 22A to process the inputted telegram. Meanwhile the telegrams inputted under such conditions, are written into the area 22B. In other words, both areas 22A and 22B are switched with each other to transfer the input data received from the port 30 and to process the data via the MPU 10 for each input of a telegram. As a result, the MPU 10 is not required for the transfer of data. Thus it is possible to prevent the deterioration of the processing capability of the MPU 10 due to the transfer of data.

Description

[Detailed Description of the Invention] [Summary] Regarding a method of transferring data input to a serial communication port to a storage device, a second storage device that duplicates the data transfer area in a first storage device is provided.
The purpose of the present invention is to provide a data transfer method that does not reduce the processing capacity of a microprocessor by providing a storage device, switching between uses using a bus switch, and eliminating the need for the microprocessor to intervene in data transfer. Connect the serial communication port to one of the transfer data area and the second storage device using the bus switch, connect the microprocessor to the other, and sequentially transfer the data received by the serial communication port, and receive the message. , Each time the transfer is completed, the bus switch switches between the transfer data area and the second storage device, and the microprocessor processes the input message and transfers the input message to the storage device. The area and the second storage device are configured to be switched and used alternately.

[Industrial application field]

The present invention relates to a method for transferring data input from a serial communication port to a storage device.

In a processing system that takes in and processes data sent through a line, the data is received by a serial communication port, and the received data is transferred to a storage device by a direct memory access controller.

There is a demand for a data transfer method that performs data transfer to a storage device independently of the processing of the microprocessor and does not reduce the processing ability of the microprocessor.

[Conventional technology]

FIG. 3 is a block diagram illustrating a conventional example, and FIG. 4 is a diagram illustrating a flowchart of the conventional example.

The conventional example shown in FIG. 3 includes a microprocessor (hereinafter referred to as MPU) 10 that performs various processes, a storage device 2OA that has an area for storing various data, and an area for storing data transferred from a serial communication port 30. , a serial communication port 30 that receives data sent through the line, and a direct memory access controller (hereinafter referred to as DMAC) 50 that controls the operation of controlling data transfer between the storage device 20A and the serial communication port 30. It is configured.

The operation of the above-mentioned conventional example will be explained with reference to the flowchart shown in FIG.

■ Input data of one character (usually 8 bits, 16 bits, etc.) to the serial communication port 30.

■ Serial communication port 30 allows DM by inputting data.
Send DMA REQUEST to AC50.

■ DMAC50 HOLD REQU to MPU10
EST transmission.

■ When MPUl0 confirms HOLD REQUEST, it interrupts the process, releases the bus, and starts HOLD AC.
Return K to DMAC50.

■ DMAC50 connects DMA to serial communication port 30.
At the same time as returning the ACK, data is transferred from the serial communication port 30 to the storage device 2OA.

■ When data transfer is completed, DMAC50 becomes HOLD.
The MPU10 cancels the REQUEST and resumes normal processing using the bus.

■ When there is next received data, return to step (■) and execute the transfer process.

[Problems to be Solved by the Invention] In the above-mentioned conventional example, when data is transferred between a serial communication port and a storage device for communication with another device, etc.
Every time one character of data is input to the serial communication port, HOLDREQUEST is sent to the MPU, and M
Since the PU processing is interrupted and the bus is released, the processing capacity of the MPU is reduced.

The present invention provides a second storage device that duplicates the data transfer area in the first storage device, uses a bus switch to switch between uses, and prevents the microprocessor from intervening in data transfer. The purpose of the present invention is to provide a data transfer method that does not reduce processing capacity.

[Means to solve the problem]

FIG. 1 shows a block diagram illustrating the invention in detail.

10 in the block diagram of the embodiment of the present invention shown in FIG. 1 is an MPU that performs various processes, and 20 is an area 21 for storing various data and an area 22A for storing data transferred from the serial communication port 0. 22B is the first storage device having the first storage device 2.
0 is a second storage device that duplicates the transfer data area 22A; 30 is a serial communication port that receives data sent through the line; 40 is a second storage device that duplicates the transfer data area 22A; Transfer data area 22 inside
This is a bus switch that switches between the storage device A and the second storage device 22B, and by providing such means, it is a means for solving this problem.

[For production]

Areas 21 of the first storage device 20 other than the data transfer area 22A are always connected to MPU10.

First, in the initial state, MPU10 is connected to the second storage device 22B for data transfer, and the serial communication port 30 is connected to the data transfer area 22A of the first storage device 20.
Assume that it is connected to.

In this state, when data is input to the serial communication port 30, the input data is sequentially transferred character by character to the data transfer area 22A.

lInform the serial communication port 3 that the message transfer has been completed.
When 0 is confirmed, operate the bus switch 40,
The transfer data area 22A in the first storage device 20 and the second
The MPU10 accesses the transfer data area 22A and processes the input message, and the message input during this time is transferred to the second storage device 22B.
Connect to write to B.

Each time a message is input, the transfer data area 22A and the second storage area 22B are alternately used to transfer input data from the serial communication port 30 and process from MPU10, so that MPU10 is used for data transfer. Since the processor no longer intervenes, the processing capacity of MPU10 does not decrease due to data transfer.

〔Example〕

The gist of the present invention will be specifically explained below with reference to embodiments shown in FIGS. 1 and 2.

FIG. 1 is a block diagram illustrating the present invention in detail, and FIG. 2 is a diagram illustrating a flowchart of an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

The embodiment of the present invention shown in FIG. 1 has a data transfer area 22A in the first storage device 20 and a
The bus switch 40 is used to switch between the 2B and 2B.

The operation of the embodiment shown in FIG. 1 will be explained with reference to the flowchart shown in FIG.

Area 21 in the first storage device 20 is always connected to MPU10.

(1) Regarding the processing of the received message, MPUl0
The data transfer area 22A in the storage device 20 is connected to the serial communication port 30 and executes processing.

(2) Input one character data to serial communication port 30.

(3) The serial communication port 30 transfers data to the data transfer area 22A in the first storage device 20.

(4) If the message has not finished, return to (3).
Data transfer from the serial communication port 30 to the data transfer area 22A continues.

(5) When one message is completed, the bus switch 40 switches between the data transfer area 22A and the second storage device 22B.

(6) The MPUIO accesses the data transfer area 22A and processes the input message.

In this state, data input to the serial communication port 30 is transferred to the second storage device 22B.

As mentioned above, by providing two data transfer M areas and alternately using the transfer of data received at the serial communication port and the processing from the MPU, the MPU does not have to intervene in data reception and transfer. 0, and it becomes possible to prevent the processing capacity of the MPU from being affected by data transfer.

〔Effect of the invention〕

According to the present invention as described above, there is no need for the MPU to intervene in data transfer, and the MPU involved in data transfer
It is possible to provide a data transfer method that can prevent a decrease in the processing capacity of the computer.

[Brief explanation of drawings]

FIG. 1 is a block diagram explaining the present invention in detail, FIG. 2 is a diagram explaining a flowchart of an embodiment of the present invention, FIG. 3 is a block diagram explaining a conventional example, and FIG. 4 is a flowchart of a conventional example. , respectively, are shown. In the figure, 10 is an MPU. 20 is a first storage device; 20A is a storage device; 21 is a storage area for various data; 22A is a data transfer area; 22B is a second storage device; 30 is a serial communication port; 40 is a bus The switch 50 is a DMAC. are shown respectively. Fig. 1 is a block diagram explaining the detailed explanation of the present invention Fig. 2 is a block diagram explaining a conventional example Fig. 3 is a block diagram explaining a conventional example Fig. 4 is a drawing explaining a flow chart of a conventional example

Claims (1)

[Claims] A first processor having a microprocessor (10), an area (21) for storing various data, and a data transfer area (22A).
In a processing system comprising a storage device (20) and a serial communication port (30), the first storage device (20) transfers data received by the serial communication port (30) and writes the data.
a second storage device (22B) that duplicates the transfer data area (22A);
) is provided, and a bus switch (40) is provided to switch between the transfer data area (22A) and the second storage device (22B), and the bus switch (40) allows the serial communication port (30) to switch between the transfer data area (22A) and the second storage device (22B). data area (22A),
The second storage device (22B) is connected to one side, and the microprocessor (10) is connected to the other, and data received by the serial communication port (30) is sequentially transferred to receive one message. , each time the transfer is completed, the bus switch (40) switches the transfer data area (22A
) and the second storage device (22B), and the microprocessor (10) processes the input message and transfers the input message to the storage device with the transfer data area (22A). The second storage device (22
A data transfer method characterized by alternately switching and using B).