JPH0292941U - - Google Patents

Info

Publication number
JPH0292941U
JPH0292941U JP1989001596U JP159689U JPH0292941U JP H0292941 U JPH0292941 U JP H0292941U JP 1989001596 U JP1989001596 U JP 1989001596U JP 159689 U JP159689 U JP 159689U JP H0292941 U JPH0292941 U JP H0292941U
Authority
JP
Japan
Prior art keywords
lead
lead frame
die island
clamp
island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989001596U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989001596U priority Critical patent/JPH0292941U/ja
Publication of JPH0292941U publication Critical patent/JPH0292941U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP1989001596U 1989-01-12 1989-01-12 Pending JPH0292941U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989001596U JPH0292941U (enExample) 1989-01-12 1989-01-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989001596U JPH0292941U (enExample) 1989-01-12 1989-01-12

Publications (1)

Publication Number Publication Date
JPH0292941U true JPH0292941U (enExample) 1990-07-24

Family

ID=31201618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989001596U Pending JPH0292941U (enExample) 1989-01-12 1989-01-12

Country Status (1)

Country Link
JP (1) JPH0292941U (enExample)

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