JPH028233U - - Google Patents
Info
- Publication number
- JPH028233U JPH028233U JP8620288U JP8620288U JPH028233U JP H028233 U JPH028233 U JP H028233U JP 8620288 U JP8620288 U JP 8620288U JP 8620288 U JP8620288 U JP 8620288U JP H028233 U JPH028233 U JP H028233U
- Authority
- JP
- Japan
- Prior art keywords
- vco
- lpf
- pll circuit
- level
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第１図はこの考案の１つの実施例に係るＰＬＬ
回路を示すブロツク図、第２図は第１図の動作を
示す説明図、第３図は他の実施例に係るＰＬＬ回
路を示すブロツク図、第４図は第３図のＰＬＬ回
路におけるＶＣＯ制御電圧と入力信号周波数との
関係を表す線図、第５図は第３図のマイクロコン
ピユータの動作を示すフローチヤート、第６図は
第３図の変形例におけるＶＣＯ制御電圧と入力信
号周波数との関係を示す線図、第７図は第３図の
変形例におけるマイクロコンピユータの動作を示
すフローチヤートである。
１０，２０：位相比較器、１２：ＬＰＦ、１４
：加算器、１６：ＶＣＯ、１８：シフト電圧発生
回路、２２：マイクロコンピユータ。
FIG. 1 shows a PLL according to one embodiment of this invention.
A block diagram showing the circuit, FIG. 2 is an explanatory diagram showing the operation of FIG. 1, FIG. 3 is a block diagram showing a PLL circuit according to another embodiment, and FIG. 4 shows VCO control in the PLL circuit of FIG. 3. 5 is a flowchart showing the operation of the microcomputer in FIG. 3; FIG. 6 is a diagram showing the relationship between the VCO control voltage and the input signal frequency in a modification of FIG. 3. FIG. 7 is a flowchart showing the operation of the microcomputer in a modification of FIG. 3. 10, 20: Phase comparator, 12: LPF, 14
: Adder, 16: VCO, 18: Shift voltage generation circuit, 22: Microcomputer.
Claims (1)
信号をＬＰＦで積分したあとＶＣＯへ制御電圧と
して出力するＰＬＬ回路において、 ＬＰＦとＶＣＯ間にレベルシフト部を設け、 外部入力信号の周波数変化に応じてＬＰＦ出力
をレベルシフトさせてＶＣＯへ出力すること、 を特徴とするＰＬＬ回路。 (2) アンロツク時にＬＰＦの出力を所定量レベ
ルシフトさせてＶＣＯへ出力すること、 を特徴とする第１項記載のＰＬＬ回路。[Claims for Utility Model Registration] (1) In a PLL circuit that integrates a phase difference signal between an external input signal and a VCO oscillation signal using an LPF and then outputs it as a control voltage to the VCO, a level shift section is provided between the LPF and the VCO. A PLL circuit characterized by: level-shifting an LPF output according to a frequency change of an external input signal and outputting the LPF output to a VCO. (2) The PLL circuit according to item 1, wherein the level of the output of the LPF is shifted by a predetermined amount at the time of unlocking and outputted to the VCO.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988086202U JP2503747Y2 (en) | 1988-06-29 | 1988-06-29 | PLL circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988086202U JP2503747Y2 (en) | 1988-06-29 | 1988-06-29 | PLL circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH028233U true JPH028233U (en) | 1990-01-19 |
| JP2503747Y2 JP2503747Y2 (en) | 1996-07-03 |
Family
ID=31310845
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988086202U Expired - Lifetime JP2503747Y2 (en) | 1988-06-29 | 1988-06-29 | PLL circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2503747Y2 (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49120572A (en) * | 1973-03-16 | 1974-11-18 | ||
| JPS59198028A (en) * | 1983-04-26 | 1984-11-09 | Anritsu Corp | Phase locked circuit |
| JPS609204A (en) * | 1983-06-28 | 1985-01-18 | Matsushita Electric Ind Co Ltd | Detection circuit of television signal |
| JPS61288622A (en) * | 1985-06-17 | 1986-12-18 | Victor Co Of Japan Ltd | Pll device |
| JPS623528A (en) * | 1985-06-28 | 1987-01-09 | Casio Comput Co Ltd | Pll oscillator |
-
1988
- 1988-06-29 JP JP1988086202U patent/JP2503747Y2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49120572A (en) * | 1973-03-16 | 1974-11-18 | ||
| JPS59198028A (en) * | 1983-04-26 | 1984-11-09 | Anritsu Corp | Phase locked circuit |
| JPS609204A (en) * | 1983-06-28 | 1985-01-18 | Matsushita Electric Ind Co Ltd | Detection circuit of television signal |
| JPS61288622A (en) * | 1985-06-17 | 1986-12-18 | Victor Co Of Japan Ltd | Pll device |
| JPS623528A (en) * | 1985-06-28 | 1987-01-09 | Casio Comput Co Ltd | Pll oscillator |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2503747Y2 (en) | 1996-07-03 |
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