JPH02759U - - Google Patents
Info
- Publication number
- JPH02759U JPH02759U JP1988077211U JP7721188U JPH02759U JP H02759 U JPH02759 U JP H02759U JP 1988077211 U JP1988077211 U JP 1988077211U JP 7721188 U JP7721188 U JP 7721188U JP H02759 U JPH02759 U JP H02759U
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- semiconductor chip
- stem
- bonded
- mounting structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 238000005219 brazing Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4846—Connecting portions with multiple bonds on the same bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Description
第１図は本考案の半導体チツプの実装の一実施
例の正面図、第２図はその平面図、第３図は従来
の半導体チツプの実装構造の一例の正面図、第４
図はその平面図である。
図において、１はレーザダイオードチツプ、２
はヒートシンク、４はロウ材、１０はステム、１
１は凹部、１１ａ，１１ｂは斜面、を示す。
FIG. 1 is a front view of an embodiment of a semiconductor chip mounting structure according to the present invention, FIG. 2 is a plan view thereof, FIG. 3 is a front view of an example of a conventional semiconductor chip mounting structure, and FIG.
The figure is a plan view thereof. In the figure, 1 is a laser diode chip, 2 is a laser diode chip, and 2 is a laser diode chip.
is the heat sink, 4 is the brazing material, 10 is the stem, 1
1 indicates a recess, and 11a and 11b indicate slopes.
Claims (1)
されてステム１０に接着された構造において、 上記ステム１０に上記ヒートシンクに対応した
大きさの凹部１１を設け、 上記ヒートシンク２が上記凹部１１内に埋め込
まれた状態でその底面２ａ及び側面２ｂ，２ｃ，
２ｄを接着されてなる構成の半導体チツプの実装
構造。[Claims for Utility Model Registration] In a structure in which a semiconductor chip 1 is mounted on the upper surface of a heat sink 2 and bonded to a stem 10, the stem 10 is provided with a recess 11 of a size corresponding to the heat sink, and the heat sink 2 is The bottom surface 2a and side surfaces 2b, 2c,
A semiconductor chip mounting structure consisting of 2D bonded together.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988077211U JPH02759U (en) | 1988-06-10 | 1988-06-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988077211U JPH02759U (en) | 1988-06-10 | 1988-06-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02759U true JPH02759U (en) | 1990-01-05 |
Family
ID=31302206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988077211U Pending JPH02759U (en) | 1988-06-10 | 1988-06-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02759U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007048839A (en) * | 2005-08-08 | 2007-02-22 | Mitsubishi Electric Corp | Semiconductor element |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6149467B2 (en) * | 1978-01-30 | 1986-10-29 | Nat House Ind |
-
1988
- 1988-06-10 JP JP1988077211U patent/JPH02759U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6149467B2 (en) * | 1978-01-30 | 1986-10-29 | Nat House Ind |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007048839A (en) * | 2005-08-08 | 2007-02-22 | Mitsubishi Electric Corp | Semiconductor element |