JPH02666U - - Google Patents
Info
- Publication number
- JPH02666U JPH02666U JP7861188U JP7861188U JPH02666U JP H02666 U JPH02666 U JP H02666U JP 7861188 U JP7861188 U JP 7861188U JP 7861188 U JP7861188 U JP 7861188U JP H02666 U JPH02666 U JP H02666U
- Authority
- JP
- Japan
- Prior art keywords
- comparator
- hold capacitor
- voltage
- buffer amplifier
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図および第２図は本考案のピークホールド
回路の一実施例を示す構成図およびその動作波形
図、第３図は従来のピークホールド回路の一例を
示す構成図である。
１……理想ダイオード回路、２……バツフアア
ンプ、３……コンパレータ、Ａ１……ＯＰアンプ
、Ｄ１，Ｄ２……ダイオード、ＣＨ……ホールド
コンデンサ、ＳＷ……リセツトスイツチ、Ｒ……
抵抗、＋Ｖｃｃ……電流源。
1 and 2 are block diagrams showing one embodiment of the peak hold circuit of the present invention and its operating waveform diagram, and FIG. 3 is a block diagram showing an example of a conventional peak hold circuit. 1...Ideal diode circuit, 2...Buffer amplifier, 3...Comparator, A1...OP amplifier, D1, D2...Diode, CH...Hold capacitor, SW...Reset switch, R...
Resistor, +Vcc...current source.
Claims (1)
入力電圧のピーク値に追従させるとともにこの端
子電圧をバツフアアンプを介して出力するように
したピークホールド回路において、入力電圧と前
記バツフアアンプの出力電圧とを比較するコンパ
レータと、このコンパレータの出力端と前記ホー
ルドコンデンサとの間に挿入されたダイオードと
、前記ホールドコンデンサを充電するために抵抗
を介して前記コンパレータの出力端に接続された
電流源とを具備してなるピークホールド回路。 In a peak hold circuit that charges a hold capacitor so that its terminal voltage follows the peak value of the input voltage and outputs this terminal voltage via a buffer amplifier, a comparator that compares the input voltage with the output voltage of the buffer amplifier. a diode inserted between the output end of the comparator and the hold capacitor; and a current source connected to the output end of the comparator via a resistor to charge the hold capacitor. peak hold circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7861188U JPH02666U (en) | 1988-06-14 | 1988-06-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7861188U JPH02666U (en) | 1988-06-14 | 1988-06-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02666U true JPH02666U (en) | 1990-01-05 |
Family
ID=31303524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7861188U Pending JPH02666U (en) | 1988-06-14 | 1988-06-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02666U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01263562A (en) * | 1988-04-15 | 1989-10-20 | Iwatsu Electric Co Ltd | Peak detector |
-
1988
- 1988-06-14 JP JP7861188U patent/JPH02666U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01263562A (en) * | 1988-04-15 | 1989-10-20 | Iwatsu Electric Co Ltd | Peak detector |