JPH01135827U - - Google Patents
Info
- Publication number
- JPH01135827U JPH01135827U JP3195888U JP3195888U JPH01135827U JP H01135827 U JPH01135827 U JP H01135827U JP 3195888 U JP3195888 U JP 3195888U JP 3195888 U JP3195888 U JP 3195888U JP H01135827 U JPH01135827 U JP H01135827U
- Authority
- JP
- Japan
- Prior art keywords
- output
- semiconductor device
- circuit
- peak hold
- inverting input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 1
Description
第１図は、本考案によるオフセツト電圧キヤン
セル回路の回路図、第２図１は第１図の回路中Ａ
点における電圧波形を示した図、第２図２は第１
図の回路中Ｂ点における電圧波形を示した図、第
２図３は第１図の回路中Ｃ点における電圧波形を
示した図、第３図は従来例の回路図、第４図１は
第３図の回路中３Ａ点における電圧波形を示した
図、第４図２は第３図の回路中３Ｂ点における電
圧波形を示した図。
ＣＣＤ……電荷結合素子、Ｕ１，Ｕ２，Ｕ３，
Ｕ３１，Ｕ３２……演算増幅器、Ｖｃｃ……電源
電圧、Ｒ１，Ｒ２，Ｒ３，Ｒ４，Ｒ５，Ｒ６，Ｒ
３１，Ｒ３２，Ｒ３３，Ｒ３４，Ｒ３５，Ｒ３６
，Ｒ３７……抵抗、Ｄ１……ダイオード、Ｃ１…
…コンデンサ、Ｘ……ピークホールド回路部。
1 is a circuit diagram of an offset voltage cancel circuit according to the present invention, and FIG. 2 1 is a circuit diagram of an offset voltage cancel circuit according to the present invention.
Figure 2 shows the voltage waveform at the first point.
Figure 2 is a diagram showing the voltage waveform at point B in the circuit in Figure 1, Figure 2 is a diagram showing the voltage waveform at point C in the circuit in Figure 1, Figure 3 is a circuit diagram of a conventional example, Figure 4 is FIG. 4 is a diagram showing the voltage waveform at point 3A in the circuit of FIG. 3, and FIG. 4 is a diagram showing the voltage waveform at point 3B in the circuit of FIG. CCD...charge coupled device, U 1 , U 2 , U 3 ,
U 31 , U 32 ... operational amplifier, Vcc ... power supply voltage, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R
31 , R 32 , R 33 , R 34 , R 35 , R 36
, R37 ...Resistance, D1 ...Diode, C1 ...
...Capacitor, X...Peak hold circuit section.
Claims (1)
力を受けるピークホールド回路と、そのピークホ
ールド回路の出力を非反転入力とし前記半導体素
子の出力を反転入力とする演算増幅器とからなる
半導体素子のオフセツト電圧キヤンセル回路。 An offset voltage canceller for a semiconductor device, which is composed of a peak hold circuit that receives the output of a semiconductor device whose output signal is a negative output, and an operational amplifier that uses the output of the peak hold circuit as a non-inverting input and the output of the semiconductor device as an inverting input. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3195888U JPH01135827U (en) | 1988-03-10 | 1988-03-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3195888U JPH01135827U (en) | 1988-03-10 | 1988-03-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01135827U true JPH01135827U (en) | 1989-09-18 |
Family
ID=31258208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3195888U Pending JPH01135827U (en) | 1988-03-10 | 1988-03-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01135827U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0457322U (en) * | 1990-03-27 | 1992-05-18 | ||
| JPH04358443A (en) * | 1991-06-05 | 1992-12-11 | Toshiba Corp | Optical receiver |
-
1988
- 1988-03-10 JP JP3195888U patent/JPH01135827U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0457322U (en) * | 1990-03-27 | 1992-05-18 | ||
| JPH04358443A (en) * | 1991-06-05 | 1992-12-11 | Toshiba Corp | Optical receiver |