JPH0380375U - - Google Patents
Info
- Publication number
- JPH0380375U JPH0380375U JP14079989U JP14079989U JPH0380375U JP H0380375 U JPH0380375 U JP H0380375U JP 14079989 U JP14079989 U JP 14079989U JP 14079989 U JP14079989 U JP 14079989U JP H0380375 U JPH0380375 U JP H0380375U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- inverting input
- operational amplifier
- hold circuit
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図は本考案によるピークホールドの実施例
を示す回路図、第２図は同ボトムホールド回路図
、第３図、第４図はそれぞれ従来技術の一例を示
すピークホールド、ボトムホールド回路の回路図
である。
１，２……オペアンプＩＣ、３……コンデンサ
、４……抵抗、５，６，７……ダイオードである
。
Fig. 1 is a circuit diagram showing an embodiment of the peak hold according to the present invention, Fig. 2 is a bottom hold circuit diagram thereof, and Figs. 3 and 4 are circuit diagrams of a peak hold circuit and a bottom hold circuit, respectively, showing examples of the prior art. It is a diagram. 1, 2... operational amplifier IC, 3... capacitor, 4... resistor, 5, 6, 7... diode.
Claims (1)
サの電圧をオペアンプの反転入力に帰還して入力
電圧とホールド電圧を比較するピークホールド回
路において、この比較用オペアンプの出力端子と
反転入力端子間に出力端子側をアノード、反転入
力端子側をカソードとしてダイオードを取り付け
たことを特徴とするピークホールド回路。 (2) バツフアアンプを通してチヤージコンデサ
の電圧をオペアンプの反転入力に帰還して入力電
圧と、ホールド電圧を比較するボトムホールド回
路において、この比較用オペアンプの出力端子と
反転入力端子間に出力端子側をカソード、反転入
力端子側をアノードとしてダイオードを取り付け
たことを特徴とするボトムホールド回路。[Claims for Utility Model Registration] (1) In a peak hold circuit that returns the voltage of a charge capacitor to the inverting input of an operational amplifier through a buffer amplifier and compares the input voltage and hold voltage, the output terminal and the inverting input terminal of the comparison operational amplifier A peak hold circuit characterized in that a diode is installed between the output terminal side as an anode and the inverting input terminal side as a cathode. (2) In the bottom hold circuit that returns the voltage of the charge capacitor to the inverting input of the operational amplifier through the buffer amplifier and compares the input voltage with the hold voltage, connect the output terminal side to the cathode between the output terminal and the inverting input terminal of the comparison operational amplifier, A bottom hold circuit characterized in that a diode is attached with the inverting input terminal side as the anode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14079989U JPH0380375U (en) | 1989-12-05 | 1989-12-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14079989U JPH0380375U (en) | 1989-12-05 | 1989-12-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0380375U true JPH0380375U (en) | 1991-08-16 |
Family
ID=31687744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14079989U Pending JPH0380375U (en) | 1989-12-05 | 1989-12-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0380375U (en) |
-
1989
- 1989-12-05 JP JP14079989U patent/JPH0380375U/ja active Pending
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