JPS6284229U

JPS6284229U -

Info

Publication number: JPS6284229U
Application number: JP17235785U
Authority: JP
Priority date: 1985-11-11
Filing date: 1985-11-11
Publication date: 1987-05-29

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例を示す回路図、第２
図は第１図に示した端子１、端子２、Ａ点、Ｂ点
、Ｃ点の各々に印加される電圧の状態を示す波形
図、第３図は本考案の他の実施例を示す回路図、
第４図は第１図に示した端子１、端子２、Ｄ点、
Ｅ点、Ｆ点の各々に印加される電圧の状態を示す
波形図である。１，２……端子、３……フオトカプラ、３１，
３２……発光ダイオード、３３，３４……フオト
トランジスタ、６，７，８，９，１６，１７，１
８，１９……抵抗、４，５……コンデンサ、１０
……論理和回路、１１……論理積回路。 Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a waveform diagram showing the state of the voltages applied to each of terminal 1, terminal 2, point A, point B, and point C shown in figure 1, and figure 3 is a circuit showing another embodiment of the present invention. figure,
Figure 4 shows terminal 1, terminal 2, point D shown in Figure 1,
FIG. 3 is a waveform diagram showing the states of voltages applied to each of point E and point F. 1, 2...terminal, 3...photocoupler, 31,
32... Light emitting diode, 33, 34... Photo transistor, 6, 7, 8, 9, 16, 17, 1
8, 19... Resistor, 4, 5... Capacitor, 10
...OR circuit, 11...AND circuit.

Claims

[Claims for Utility Model Registration] (1) A first device that is turned on when the applied voltage has a first polarity and turned off when the voltage has a second polarity opposite to the first polarity. switch means;
off when the voltage is of the first polarity;
a second switch means that is turned on when the voltage has the second polarity; and a discharge state when the first switch means is on, and a charging state when the first switch means is off. a first circuit that is in a discharging state when the second switch means is on, and a second circuit that is in a charging state when the second switch means is off; and an output of the first circuit. and a synthesizing means for synthesizing the output of the first circuit and the second circuit, and the discharging time of one of the first circuit and the second circuit is different from the charging time of the other circuit. A polarity reversal detection circuit featuring: (2) The first circuit is the first integrating circuit, and the second
is a second integrating circuit, the discharging time of the first integrating circuit is longer than the charging time of the second integrating circuit, and the charging time of the first integrating circuit is longer than the charging time of the second integrating circuit. 2. A polarity reversal detection circuit according to claim (1), wherein the combining means is an OR circuit. (3) The first circuit is the first integrating circuit, and the second
is a second integrating circuit, the discharging time of the first integrating circuit is shorter than the charging time of the second integrating circuit, and the charging time of the first integrating circuit is shorter than the charging time of the second integrating circuit. 2. The polarity reversal detection circuit according to claim 1, wherein the combining means is an AND circuit.