JPS61165465U - - Google Patents
Info
- Publication number
- JPS61165465U JPS61165465U JP5015085U JP5015085U JPS61165465U JP S61165465 U JPS61165465 U JP S61165465U JP 5015085 U JP5015085 U JP 5015085U JP 5015085 U JP5015085 U JP 5015085U JP S61165465 U JPS61165465 U JP S61165465U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- output
- buffer circuit
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000001514 detection method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図は本考案実施例回路の構成を示す回路接
続図。第２図は第１図に示す各部の信号波形を示
す波形図。第３図は従来例回路の構成を示す回路
接続図。
１，５，７……コンデンサ、２……トランジス
タ、３，６……抵抗、４，８……ダイオード、１
０，３０……クランプ回路、１１……入力バツフ
ア回路、１２……トランジスタクランプ回路、１
３……出力バツフア回路、２０……整流回路、Ｉ
Ｎ……入力端子、ＯＵＴ……出力端子、ＶＢ……
ベースバイアス用プラス電源端子、ＶＣ，ＶＤ…
…プラス電源端子、ＶＥ……マイナス電源端子。
FIG. 1 is a circuit connection diagram showing the configuration of a circuit according to an embodiment of the present invention. FIG. 2 is a waveform diagram showing signal waveforms of each part shown in FIG. 1. FIG. 3 is a circuit connection diagram showing the configuration of a conventional circuit. 1, 5, 7... Capacitor, 2... Transistor, 3, 6... Resistor, 4, 8... Diode, 1
0, 30... Clamp circuit, 11... Input buffer circuit, 12... Transistor clamp circuit, 1
3... Output buffer circuit, 20... Rectifier circuit, I
N...Input terminal, OUT...Output terminal, VB...
Base bias positive power supply terminal, VC, VD...
...Positive power terminal, VE...Minus power terminal.
Claims (1)
プ回路と、 このクランプ回路の出力を整流してこの入力信
号のピーク値に相応する値を有する直流信号を生
成する整流回路と、 を備えたピーク値検出回路において、 上記入力信号を入力とする低出力インピーダン
スの入力バツフア回路と、 上記整流回路の入力端子に出力端子が接続され
た高入力インピーダンスの出力バツフア回路と を備え、 上記クランプ回路は、 上記入力バツフア回路の出力端子と上記出力バ
ツフア回路の入力端子との間に接続されたコンデ
ンサと、このコンデンサと上記出力バツフア回路
の入力端子の接続点にエミツタ電極が接続された
トランジスタと、この接続点に接続された上記ト
ランジスタのバイアス抵抗とを含むクランプ手段
と を備えたことを特徴とするピーク値検出回路。[Claims for Utility Model Registration] A clamp circuit that regenerates the DC component contained in an input signal, and a rectifier circuit that rectifies the output of this clamp circuit to generate a DC signal having a value corresponding to the peak value of this input signal. and a peak value detection circuit comprising: a low output impedance input buffer circuit that receives the input signal as an input; and a high input impedance output buffer circuit whose output terminal is connected to the input terminal of the rectifier circuit. , The clamp circuit includes a capacitor connected between the output terminal of the input buffer circuit and the input terminal of the output buffer circuit, and an emitter electrode connected to the connection point between this capacitor and the input terminal of the output buffer circuit. 1. A peak value detection circuit comprising a clamping means including a transistor and a bias resistor of the transistor connected to the connection point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5015085U JPS61165465U (en) | 1985-04-04 | 1985-04-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5015085U JPS61165465U (en) | 1985-04-04 | 1985-04-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61165465U true JPS61165465U (en) | 1986-10-14 |
Family
ID=30568014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5015085U Pending JPS61165465U (en) | 1985-04-04 | 1985-04-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61165465U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159070A (en) * | 1982-03-16 | 1983-09-21 | Matsushita Electric Ind Co Ltd | Clamping circuit |
-
1985
- 1985-04-04 JP JP5015085U patent/JPS61165465U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159070A (en) * | 1982-03-16 | 1983-09-21 | Matsushita Electric Ind Co Ltd | Clamping circuit |
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