JPH0265353U - - Google Patents

Info

Publication number
JPH0265353U
JPH0265353U JP14550388U JP14550388U JPH0265353U JP H0265353 U JPH0265353 U JP H0265353U JP 14550388 U JP14550388 U JP 14550388U JP 14550388 U JP14550388 U JP 14550388U JP H0265353 U JPH0265353 U JP H0265353U
Authority
JP
Japan
Prior art keywords
lead terminal
flat lead
integrated circuit
notch
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14550388U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14550388U priority Critical patent/JPH0265353U/ja
Publication of JPH0265353U publication Critical patent/JPH0265353U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の斜視図、第2図は
第1図の集積回路を回路基板に実装状態を示す部
分拡大斜視図、第3図および第4図はそれぞれ従
来の平面実装型集積回路の斜視図である。 1,6,8……パツケージ、2,7,9……平
形リード端子、3……切り欠き、4……回路基板
、5……配線導体、10……水平折り曲げ部。
Fig. 1 is a perspective view of an embodiment of the present invention, Fig. 2 is a partially enlarged perspective view showing the state in which the integrated circuit of Fig. 1 is mounted on a circuit board, and Figs. 3 and 4 are respectively conventional planar mounting. 1 is a perspective view of a type integrated circuit; FIG. 1, 6, 8...Package, 2, 7, 9...Flat lead terminal, 3...Notch, 4...Circuit board, 5...Wiring conductor, 10...Horizontal bent portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パツケージの側面から下方に折り曲げられた平
形リード端子を有する平面実装型集積回路におい
て、前記平形リード端子の先端部に切り欠きが設
けられていることを特徴とする表面実装型集積回
路。
1. A surface mount integrated circuit having a flat lead terminal bent downward from a side surface of a package, characterized in that a notch is provided at the tip of the flat lead terminal.
JP14550388U 1988-11-07 1988-11-07 Pending JPH0265353U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14550388U JPH0265353U (en) 1988-11-07 1988-11-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14550388U JPH0265353U (en) 1988-11-07 1988-11-07

Publications (1)

Publication Number Publication Date
JPH0265353U true JPH0265353U (en) 1990-05-16

Family

ID=31414153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14550388U Pending JPH0265353U (en) 1988-11-07 1988-11-07

Country Status (1)

Country Link
JP (1) JPH0265353U (en)

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