JPH0258349U - - Google Patents

Info

Publication number
JPH0258349U
JPH0258349U JP13714388U JP13714388U JPH0258349U JP H0258349 U JPH0258349 U JP H0258349U JP 13714388 U JP13714388 U JP 13714388U JP 13714388 U JP13714388 U JP 13714388U JP H0258349 U JPH0258349 U JP H0258349U
Authority
JP
Japan
Prior art keywords
floating gate
gate
different
floating
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13714388U
Other languages
Japanese (ja)
Other versions
JPH0723959Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988137143U priority Critical patent/JPH0723959Y2/en
Publication of JPH0258349U publication Critical patent/JPH0258349U/ja
Application granted granted Critical
Publication of JPH0723959Y2 publication Critical patent/JPH0723959Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は一実施例を示す平面図、第2図は第1
図のA―A′線位置での断面図である。 2……シリコン基板、6,8……活性領域、1
0……ゲート酸化膜、12,14……フローテイ
ングゲート、20,22……トンネル酸化膜。
FIG. 1 is a plan view showing one embodiment, and FIG. 2 is a plan view showing one embodiment.
FIG. 3 is a sectional view taken along line AA' in the figure. 2... Silicon substrate, 6, 8... Active region, 1
0... Gate oxide film, 12, 14... Floating gate, 20, 22... Tunnel oxide film.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フローテイングゲートを備えたEEPROMに
おいて、フローテイングゲートがチヤネル領域上
で分割されており、これらのフローテイングゲー
トのトンネル酸化膜領域は互いに異なる活性領域
上に設けられており、かつ、これらのフローテイ
ングゲートの面積とチヤネル幅の少なくとも一方
が互いに異なつている不揮発性半導体メモリ装置
In an EEPROM with a floating gate, the floating gate is divided on a channel region, and the tunnel oxide film regions of these floating gates are provided on different active regions, and A nonvolatile semiconductor memory device in which at least one of gate area and channel width is different from each other.
JP1988137143U 1988-10-20 1988-10-20 Nonvolatile semiconductor memory device Expired - Lifetime JPH0723959Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988137143U JPH0723959Y2 (en) 1988-10-20 1988-10-20 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988137143U JPH0723959Y2 (en) 1988-10-20 1988-10-20 Nonvolatile semiconductor memory device

Publications (2)

Publication Number Publication Date
JPH0258349U true JPH0258349U (en) 1990-04-26
JPH0723959Y2 JPH0723959Y2 (en) 1995-05-31

Family

ID=31398301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988137143U Expired - Lifetime JPH0723959Y2 (en) 1988-10-20 1988-10-20 Nonvolatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPH0723959Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60169172A (en) * 1984-02-13 1985-09-02 Toshiba Corp Insulating gate type field effect transistor
JPS6294987A (en) * 1985-10-21 1987-05-01 Nec Corp Mis field effect semiconductor device and detecting method for information thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60169172A (en) * 1984-02-13 1985-09-02 Toshiba Corp Insulating gate type field effect transistor
JPS6294987A (en) * 1985-10-21 1987-05-01 Nec Corp Mis field effect semiconductor device and detecting method for information thereof

Also Published As

Publication number Publication date
JPH0723959Y2 (en) 1995-05-31

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