JPH0254295U - - Google Patents

Info

Publication number
JPH0254295U
JPH0254295U JP6748689U JP6748689U JPH0254295U JP H0254295 U JPH0254295 U JP H0254295U JP 6748689 U JP6748689 U JP 6748689U JP 6748689 U JP6748689 U JP 6748689U JP H0254295 U JPH0254295 U JP H0254295U
Authority
JP
Japan
Prior art keywords
circuit
hybrid integrated
integrated circuit
switching circuit
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6748689U
Other languages
Japanese (ja)
Other versions
JPH0543513Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6748689U priority Critical patent/JPH0543513Y2/ja
Publication of JPH0254295U publication Critical patent/JPH0254295U/ja
Application granted granted Critical
Publication of JPH0543513Y2 publication Critical patent/JPH0543513Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Electronic Switches (AREA)
  • Coils Or Transformers For Communication (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の混成集積回路装置を説明する
断面図、第2図は本考案の混成集積回路装置の電
子機器への取付け構造を説明する側面図、第3図
A、第3図B、第4図A、第4図B、第5図A、
第6図Aおよび第6図Bは本考案の混成集積回路
装置のコアを説明する側面図および断面図である
。 主な図番の説明、1は金属基板、6は外部リー
ド、7はコアである。
Fig. 1 is a cross-sectional view illustrating the hybrid integrated circuit device of the present invention, Fig. 2 is a side view illustrating the mounting structure of the hybrid integrated circuit device of the present invention to electronic equipment, Fig. 3A, Fig. 3B , Figure 4A, Figure 4B, Figure 5A,
FIGS. 6A and 6B are a side view and a cross-sectional view illustrating the core of the hybrid integrated circuit device of the present invention. Explanation of main figure numbers: 1 is a metal substrate, 6 is an external lead, and 7 is a core.

Claims (1)

【実用新案登録請求の範囲】 表面を絶縁処理した良熱伝導性金属基板と 該基板上に形成した所望のスイツチング回路と 該回路と外部回路との接続をする外部リードと モールド樹脂にその一端が埋込んで固定され全
ての外部リードに取付けられた複数の孔を有した
磁性体より成るコアとを備えた混成集積回路にお
いて、 前記混成集積回路はアルミシールドボツクス内
に配置された絶縁フイルムを介して取付けられて
いることを特徴とするスイツチング回路を組込ん
だ混成集積回路装置。
[Scope of claim for utility model registration] A metal substrate with good thermal conductivity whose surface is insulated, a desired switching circuit formed on the substrate, an external lead for connecting the circuit to an external circuit, and one end of which is attached to a molded resin. In a hybrid integrated circuit comprising a core made of a magnetic material embedded and fixed and having a plurality of holes attached to all external leads, the hybrid integrated circuit is connected to the core through an insulating film placed in an aluminum shield box. 1. A hybrid integrated circuit device incorporating a switching circuit, characterized in that the switching circuit is installed in the device.
JP6748689U 1989-06-09 1989-06-09 Expired - Lifetime JPH0543513Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6748689U JPH0543513Y2 (en) 1989-06-09 1989-06-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6748689U JPH0543513Y2 (en) 1989-06-09 1989-06-09

Publications (2)

Publication Number Publication Date
JPH0254295U true JPH0254295U (en) 1990-04-19
JPH0543513Y2 JPH0543513Y2 (en) 1993-11-02

Family

ID=31292856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6748689U Expired - Lifetime JPH0543513Y2 (en) 1989-06-09 1989-06-09

Country Status (1)

Country Link
JP (1) JPH0543513Y2 (en)

Also Published As

Publication number Publication date
JPH0543513Y2 (en) 1993-11-02

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