JPH0241459U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a sectional view showing the structure of one embodiment of the present invention, Fig. 2 is a plan view showing the pattern of each region of the embodiment of Fig. 1, and Fig. 3 is the structure of another embodiment of the invention. FIG. 4 is a sectional view showing an example of the structure of a conventional semiconductor light receiving element. 1...P-type substrate layer, 2...N epitaxial layer, 3
...P isolation diffusion layer, 4...P diffusion layer, 5
...N ⁺ diffusion layer, 6...P buried layer, 7...N ⁺ buried layer,
8...P diffusion layer. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] An N epitaxial layer is formed on a P type substrate, and a P
In a semiconductor light-receiving device consisting of chips separated by an isolation diffusion layer, a plurality of small island-shaped P buried layers provided on a P-type substrate layer and a contact layer for metal wiring in an N epitaxial layer are excluded. The above-mentioned P is provided in the region by diffusion of a P isolation diffusion layer.
a plurality of small island-like deep P diffusion layers not in contact with the buried layer; and a plurality of small island-like deep P diffusion layers provided in a region of the N epitaxial layer excluding the metal wiring contact layer. 1. A semiconductor light-receiving element characterized by comprising: a shallow P diffusion layer that connects the semiconductor light-receiving element;