JPH0234179B2 - - Google Patents

Info

Publication number
JPH0234179B2
JPH0234179B2 JP56147751A JP14775181A JPH0234179B2 JP H0234179 B2 JPH0234179 B2 JP H0234179B2 JP 56147751 A JP56147751 A JP 56147751A JP 14775181 A JP14775181 A JP 14775181A JP H0234179 B2 JPH0234179 B2 JP H0234179B2
Authority
JP
Japan
Prior art keywords
groove
film
polycrystalline silicon
oxidation
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56147751A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5850752A (ja
Inventor
Toshihiko Fukuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56147751A priority Critical patent/JPS5850752A/ja
Publication of JPS5850752A publication Critical patent/JPS5850752A/ja
Publication of JPH0234179B2 publication Critical patent/JPH0234179B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W10/041—
    • H10W10/40—
    • H10W20/021—

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
JP56147751A 1981-09-21 1981-09-21 半導体装置の製造方法 Granted JPS5850752A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56147751A JPS5850752A (ja) 1981-09-21 1981-09-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56147751A JPS5850752A (ja) 1981-09-21 1981-09-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5850752A JPS5850752A (ja) 1983-03-25
JPH0234179B2 true JPH0234179B2 (enExample) 1990-08-01

Family

ID=15437317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56147751A Granted JPS5850752A (ja) 1981-09-21 1981-09-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5850752A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4745081A (en) * 1985-10-31 1988-05-17 International Business Machines Corporation Method of trench filling
US4767722A (en) * 1986-03-24 1988-08-30 Siliconix Incorporated Method for making planar vertical channel DMOS structures
JPS63116445A (ja) * 1986-11-04 1988-05-20 Mitsubishi Electric Corp 半導体装置及びその製造方法
US4835586A (en) * 1987-09-21 1989-05-30 Siliconix Incorporated Dual-gate high density fet

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5525501A (en) * 1978-08-04 1980-02-23 Supensaa Hetsuzu Inc Insert for ignition deck of internal

Also Published As

Publication number Publication date
JPS5850752A (ja) 1983-03-25

Similar Documents

Publication Publication Date Title
US4504332A (en) Method of making a bipolar transistor
KR100227766B1 (ko) 반도체 장치 및 그 제조 방법
US4871685A (en) Method of manufacturing bipolar transistor with self-aligned external base and emitter regions
JPH0744186B2 (ja) 半導体装置の製造方法
US4279671A (en) Method for manufacturing a semiconductor device utilizing dopant predeposition and polycrystalline deposition
JPS6240858B2 (enExample)
JPS6252963A (ja) バイポ−ラトランジスタの製造方法
US5104816A (en) Polysilicon self-aligned bipolar device including trench isolation and process of manufacturing same
US4799099A (en) Bipolar transistor in isolation well with angled corners
JPH0234179B2 (enExample)
KR950001146B1 (ko) 폴리실리콘 자체 정렬 바이폴라 장치 및 이의 제조 방법
JPS59108325A (ja) 半導体装置の製造方法
US4410375A (en) Method for fabricating a semiconductor device
US4546537A (en) Method for producing a semiconductor device utilizing V-groove etching and thermal oxidation
JP2615652B2 (ja) バイポーラトランジスタの製造方法
JPS60136327A (ja) 半導体装置の製造方法
JP2842075B2 (ja) 半導体装置の製造方法
JP3222250B2 (ja) 半導体装置の製造方法
JP2792094B2 (ja) 半導体装置の製造方法
JPS6346579B2 (enExample)
JP2718101B2 (ja) 半導体装置の製造方法
JPH0423828B2 (enExample)
JPS6129539B2 (enExample)
JP2817213B2 (ja) 半導体装置の製造方法
JP2812282B2 (ja) 半導体装置の製造方法