JPH0233622A - Display controller - Google Patents

Abstract

PURPOSE:To improve the display speed with a display controller by using a horizontal screen division data output device and an address converter and therefore displaying a window on a base screen with no use of a refresh frame memory. CONSTITUTION:In a horizontal blanking period, a base screen address generator 21 sends a base screen address 211 to a frame buffer 23. The buffer 23 supplies the horizontal line screen division pointer data 271 to a horizontal line screen division data output device 26. While a window horizontal line address generator 24 produces successively the horizontal addresses of a window C from the win dow start address in response to the horizontal counter value P1. Then a frame buffer address switch generator 25 sends a switch signal 251 to an address switch 22 at the time point when the horizontal counter reaches the value P1 and sends the address 211 to the buffer 23. Thus, it is possible to display a window on a base screen without using a refresh memory.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a multi-window display control device for workstations, graphic display devices, and the like.

BACKGROUND OF THE INVENTION In recent years, workstations and graphics devices with multi-window cutting functions have become popular for office automation and engineering applications.

A display control device for displaying images in a plurality of windows on a Lanuter-type display device has a configuration as shown in FIG.

60 is the frame buffer, 51 is! J fresh frame memory 52 is a transfer side (iX'k) that generates an address for transferring the data in the frame buffer 50 to the refresh frame memory 51; Memory read address generator.

The operation of the display control device configured as described above will be explained.

The image data of windows B and C are stored in the frame buffer 6o, and the refresh frame memory 61 physically corresponding to the display screen is stored by the transfer controller 52.
Image data is transferred from the lower priority window. The refresh frame memory read address generator 53 reads the image (image 7) of the refresh frame memory 61.
” - Send data sequentially to a raster display device.

Problems to be Solved by the Invention However, in the above configuration, since image data in windows with lower priority is overwritten in the refresh frame memory, the apparent transfer speed decreases as the number of windows increases. The problem was that smooth image display was not possible. Furthermore, refresh frame memory 51 generally requires more physical memory than is available for storing valid image data, making effective use of memory problematic.

SUMMARY OF THE INVENTION In view of the above problems, the present invention provides a display control device that has a simple configuration and aims to effectively utilize the memory by reducing the transfer time t to the refresh frame memory.

Means for Solving the Problems In order to solve the above problems, the display control device of the present invention has a frame buffer 13 as shown in FIG.
and a base screen address generator that generates a read address in synchronization with the raster of the pixel data of the base screen of the frame buffer 13, and an address for the horizontal blanking period output from the base screen address generator 11. The horizontal blanking data input device 15 inputs the screen division control data for the next horizontal line read from the frame buffer 13, and the screen division control data stored in the horizontal blanking data input device 15 is used to display the next horizontal line. Under the control of the horizontal line screen division data output device 14, which outputs the screen division data indicating the area, and the base screen address output from the base screen address generator 11, Address converter 1 that performs line address conversion and generates addresses for sequentially outputting pixel data of each window from the frame buffer.
It is composed of 2.

Operation According to the present invention, with the above-described configuration, a window can be displayed overlapping the base screen without providing a refresh frame memory, and the display speed can be improved. In addition, by rewriting the contents of the horizontal line screen division data output device that stores the frame buffer contents of the horizontal blanking period and the window information for each horizontal line, it is possible to create simple special effects and define window areas of arbitrary shapes. It becomes possible.

EXAMPLE Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the display control device of the present invention. In FIG. 2, 23 is a frame buffer. 21 is the base tonal of the display screen (
Heath screen! : Null) A base screen address generator that generates a base screen address 211 for reading image data in the frame buffer; 27 is a horizontal blanking data input that inputs data for the horizontal blanking period in the image data output of the frame buffer 23; A latch 26 is a horizontal line screen division data output device in which a window start address, a window start base, and a window end address are stored in advance. The window horizontal line address generator that reads the window start address and window start base output from the 24id horizontal line screen division data output device 26 and generates the window horizontal address 241 of the window area in the frame buffer 23 is >25. The window start base, window end address, and window address of the outputs of 26 are compared, and a switching signal 261 between the base screen address 211 and the window horizontal address 241 is generated. 22 is the base screen address 2 by the switching signal 251.
11 and an address cutter which selects the window horizontal address 241 and supplies the frame buffer address 221 to the frame buffer 23.

The operation of the display control device configured as described above will be described below with reference to FIGS. 2 and 3.

The base screen address generator 21, as shown in the operation timing of a certain Lanuter in FIG.

A, . . . addresses of frame buffer p+1 23 of the Narges screen are generated sequentially.

Here, during the horizontal blanking period, the frame buffer 23 is accessed using the base screen address 211, but this has no meaning as pixel data. Therefore, the division control data for dividing the screen of the next line, for example, the horizontal line screen division pointer signal 271 of the horizontal line screen division data output device 26, that is, the address of the horizontal line screen division data output device 26, is stored. put.

The horizontal line screen division data output device 26 stores a window start address, a window start base, and a window end address. For example, the fourth
In the figure, for the Lth line, the starting point of the horizontal line is 01
The window base address P1 of the window of C of the horizontal counter that sequentially counts 255 as the end point, and the frame buffer address C! of the window C! In is the window start address, Cm+r is the window end address, P2 is the window base address of window B,
B is stored as a window start address and Bn+t as a window end address and stored in the horizontal line screen division data output unit 26.

The window horizontal line address generator 24 sequentially generates horizontal addresses of the window C starting from the window end address C when the horizontal counter value reaches Pl. Also, the frame buffer address switching generator 26
is the address switch 22 until the horizontal counter indicates Pl.
Connect the output of the base screen address generator 21 to the output 211 of the base screen address generator 21, and when it becomes Pl, the window address 241
A switching signal 261 is generated to switch to. Also, at the next address where the window address 241 indicates Cm+r, the frame buffer address switching signal 251 attempts to supply the pace screen address 211 to the frame buffer y23VC, but the horizontal counter value indicates P2 and the window horizontal line address generator 24 generates an address from the window start address Bn of window B, and the switching signal 251 which is the output of the frame buffer address switching generator 26 connects the window address 241 to the frame buffer address 221 without any change. Next, when the window address 241 indicates Bn+t, the switching signal 525
1 operates to connect the base address 211 to the frame buffer address 221, and thereafter the frame buffer 2
3 is supplied with a base screen address 211.

In this way, the frame buffer data of the horizontal blanking period controls the screen division by window in the next horizontal line, and the base screen is displayed in units of horizontal lines, and each window is refreshed because it does not require refresh frame memory. There is no need to consider the transfer speed to the frame memory as a problem.

Effects of the Invention As described above, the present invention includes a base screen address generator, a horizontal blanking data input device for inputting window control data of the next horizontal line in the frame buffer during the horizontal blanking period by the base screen address generator; Directed by the above horizontal blanking data input word output,
By providing a horizontal screen division data output device that indicates the display area in the next horizontal line, and an address converter that performs address conversion according to the window with respect to the base screen address output from the pace screen address generator, the refresh frame Windows can be displayed over the base screen without the need for memory, improving display speed.

In addition, the data in the horizontal blanking period of the frame buffer can be used effectively, and special effects on the screen and rectangular An excellent effect can be obtained in that a window area other than the above can be formed.

[Brief explanation of the drawing]

FIG. 1 is a basic configuration diagram of the present invention, FIG. 2 is a configuration diagram of a display control device showing an embodiment of the present invention, FIG. 3 is an operation timing chart of the embodiment of the present invention, and FIG. 4 is a diagram of the present invention. Sixth schematic diagram showing an example of operation on a display screen in an embodiment of the invention
The figure is a configuration diagram of a conventional display control device. 11.21...Base screen address generator, 1
2... Address converter, 13, 23.50...
...Frame buffer, 14.26...Horizontal line screen division data output device, 15...Horizontal blanking data input device, 22...Address switch, 24 . . . Window horizontal line address generator, 26 . . . Frame buffer address switch, 51 . . . Reflex frame memory,
52...Transfer'M controller, 63...Refresh frame memory read address generator. Name of agent: Patent attorney Shigetaka Awano and 1 other person1
Figure 2 Figure 2 No.

Claims (1)

[Claims] A frame buffer, a base screen address generator that generates a read address in synchronization with a scanning line from the pixel data of the base screen of the frame buffer, and a horizontal blanking period address output from the base screen address generator, A horizontal blanking data input device inputs screen division control data for the next horizontal line read from the frame buffer, and a display area for the next horizontal line is controlled by the screen division control data stored in the horizontal blanking data input device. A horizontal line screen division data output device that outputs the screen division data shown in FIG. and an address converter that generates an address for sequentially outputting pixel data of each window from the frame buffer.