JPH02309652A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a polycrystalline silicon to be embedded into a recess and then achieve flattening without producing any stage difference by accumulating a semiconductor thin film with a film thickness which is 1/2 or more than the width of the recess and by performing oxidation so that no semiconductor thin film at an area outside the recess remains. CONSTITUTION:After eliminating a PSG film 4, the bottom part of an isolation groove 5 and a side surface part are oxidized for forming an oxide film 6, a high-concentration boron is ion-implanted into the bottom of the isolation groove 5, a channel stopper region 7 is formed at the bottom of the isolation groove 5, and then a polycrystalline silicon film 8 is accumulated by the film thickness which exceeds 1/2 of the width of the isolation groove 5. Then, after etching the polycrystalline silicon film 8 by a desired thickness so that it remains on the entire surface of substrate, the polycrystalline silicon film 8 is oxidized so that it does not remain outside the separation groove 5, thus forming an oxide film 10. Therefore, only the semiconductor thin film at a part to be eliminated other than the area within a recessed part can be changed to an oxide film and a semiconductor thin film can be embedded into the recessed part without sacrificing flattening properties.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention (9) relates to a semiconductor device and a method for manufacturing an integrated circuit device in which a large number of these devices are integrated on the same substrate.Prior art: Element separation in the manufacture of semiconductor devices As a method for forming the region, there is a method in which a trench is formed by etching the part that is to become the element isolation region, the inside of the trench is oxidized, and a polycrystalline silicon film is buried in the trench to form the element isolation region.
An example of the conventional technology will be explained with reference to FIG. 4. A silicon oxide film (
SiO*)2. Silicon nitride film (SisNJ3, PSG
Perform PSGS double film etching using the formed S double film resist as a mask.Remove the resist.I Form a separation groove 5 as a PSGS double film mask (Fig. 4(a))
.

After removing the PSGS composite film, the surface is oxidized to form an oxide film 6. Then, impurity ions are implanted and a polycrystalline silicon film 8 with a channel stopper 7 formed at the bottom of the substrate recess is deposited (see Fig. 4). b)).

Thereafter, by dry etching, the polycrystalline silicon film 8 deposited in areas other than the substrate recesses is removed, and the polycrystalline silicon film 8 is buried only in the substrate recesses (FIG. 4(C)).

The ratio is oxidized to the surface of the polycrystalline silicon film 8 to form a cap oxide film lO. The element isolation region is completed (see FIG.
d)).

Problems to be Solved by the Invention In the prior art (During dry etching of polycrystalline silicon It!!!8), when the polycrystalline silicon film 8 other than the concave portions becomes less and less, the portions of the isolation grooves 5 are damaged due to the loading effect. The etching rate of the polycrystalline silicon film 8 increases rapidly, and the polycrystalline silicon is excessively etched and a step is formed in the separation groove 5.
Furthermore, this level difference is not recovered even by subsequent Cap oxidation (see Figures 4(c) and (d)).

Therefore, due to this difference in height, a situation such as a power cut in the AI wiring or a short circuit due to the remaining Al during AI etching may occur. When embedding polycrystalline silicon in a recess, there is no step difference when embedding polycrystalline silicon in a recess.The purpose of this invention is to provide a method for manufacturing a semiconductor device that enables flattening. Means for Solving the Problems of the Invention In a semiconductor device in which a recess is formed on one main surface of a semiconductor substrate, a semiconductor film having a film thickness of at least 172 mm or more of the width of the recess is formed on the semiconductor substrate. a step of depositing a film; and a step of oxidizing the semiconductor thin film so that no residual force (at least) remains on the semiconductor thin film on one main surface of the substrate other than inside the recess, and flattening the inside of the recess with the semiconductor thin film. When a semiconductor thin film is embedded in a recess by the above-described structure, a semiconductor thin film having a thickness of at least 1/2 of the width of the recess is deposited. This makes it possible to completely fill the inside of the recess with the semiconductor thin film, and also to flatten the surface. Moreover, by using oxidation with a stable rate, it is possible to use the difference in film thickness between the semiconductor thin film inside the recess and the rest of the recess to convert only the semiconductor thin film in the portions to be removed other than the recess into an oxide film. Embodiment (Example 1) in which it is possible to embed a semiconductor thin film in a recess without impairing the flatness when depositing a semiconductor thin film. FIG. 1 is a process cross-sectional view showing a manufacturing method of FIG.

(a) Semiconductor substrate 1 upper part ζ Oxide film 2 is formed, 5itN43 is deposited on it, a PSG film 4 is not deposited, a
After removing the resist by dry etching 280M4 using this photoresist as a mask, etching the 5isNa film 3, oxidation [2] and semiconductor substrate l using the PSG film 4 as a mask to form element isolation grooves 5. (b) PSG film 4 is removed, the bottom and side surfaces of the trench are oxidized to form an oxide film 6, and high-concentration boron ions are implanted into the bottom of the isolation trench. Separation groove 5 for polycrystalline silicon film 8
(C) After etching the polycrystalline silicon film 8 to a desired thickness by dry etching or wet etching so that it remains on the entire surface of the substrate, crystalline silicon film 8
The oxide film 1 is oxidized so that it does not remain outside of the isolation trench 5.
form 0. - Oxide film 106 Table May be used as a cap film in the isolation trench as it is (oxidation 1i!jlO may be removed and an insulating film formed as an acap film (°C) Also, an epitaxial layer of the conductivity type opposite to that of the semiconductor substrate Of course, it is also possible to continue with the process shown in FIG. 1(a) after forming it on the semiconductor substrate 1. In (C),
It is also possible to directly oxidize polycrystalline silicon without etching it.If a device is formed in the area surrounded by the isolation by using the isolation part formed in this example as described above, the isolation groove part Since there are no steps, there is no possibility of electrical disconnection or short circuit of the metal wiring (- (Example 2) Fig. 2 (above 1) is a process sectional view showing a method for manufacturing a semiconductor device in a second example of the present invention. The second embodiment will be explained in detail with reference to the drawings.

(a) Using a resistive photoresist in which an oxide film 21 and a nitride film 23 are formed on a semiconductor substrate 1 as a mask, a contact hole is formed by etching in a portion (diffusion layer 22) where contact with the semiconductor substrate 1 is desired, and the resist is removed. (b) Polycrystalline silicon film 24 is
After the polycrystalline silicon film 24 is deposited to a thickness of 72 mm or more, a heat sink treatment is performed in which impurities are introduced into the polycrystalline silicon film 24 by ion implantation or the like.

(C) After etching the polycrystalline silicon film 24 to a desired thickness by dry etching or wet etching so that it remains on the entire surface of the substrate, etching the polycrystalline silicon film 24 so that it remains only in the contact hole. Oxidation is performed to form the oxide film 26. (d) After removing the oxide film 26, the metal electrode 27 cannot be formed.The resistive oxide film 26 is left as is, a window is opened in it, and the metal electrode 27 is formed on the polycrystalline silicon film 25. It is also possible to form the metal electrode 27 (~ Also, it is naturally possible to form an epitaxial layer of a conductivity type opposite to that of the semiconductor substrate 1 on the semiconductor substrate 1 and then proceed to FIG. 2(a). = In (c), is it possible to directly oxidize the polycrystalline silicon without etching? In (b), it is also possible to deposit a polycrystalline silicon film 24 containing impurities (- When a device is formed using the contacts formed according to this example as shown in FIG. is used as the emitter of a bipolar transistor (the usefulness of this contact method is further improved (Embodiment 3)). A. Detailed explanation will be provided according to the diagram.

(a) A coffin with the first layer metal wiring 31 formed on the semiconductor substrate 1 After forming the interlayer insulation wA32, through holes are opened using photoresist as a mask at the locations where contact with the first layer metal wiring 31 is desired. (b) Polycrystalline silicon film 33 is removed by l/2 of the through-hole width.
After the film is deposited to the above thickness, impurities are introduced into the polycrystalline silicon film 33 by ion implantation or the like, and a round heat treatment is performed.

(C) Dry etching or wet etching: The polycrystalline silicon film 33 is etched to a desired thickness so that it remains on the entire surface of the interlayer insulating film 32.The polycrystalline silicon film 33 is etched only in the through holes. A (d) Removal ratio of the oxide film 35 The oxide film 35 is left as is, and a window is formed on it to form the polycrystalline silicon. A second layer metal wiring 3G may be formed on the film 34 (~ Also, an epitaxial layer having a conductivity type opposite to that of the semiconductor substrate 1 is formed on the semiconductor substrate 1, and then the process continues to FIG. 3(a). In (c), it is also possible to directly oxidize the polycrystalline silicon 33 without etching it. In (b), polycrystalline silicon containing impurities g!33 (℃) This method 1 is also effective when forming the n-th layer metal wiring and the n-11th layer metal wiring.As described above, the interlayer contact formed by this example When forming wiring using , there is no step at the contact part,
According to the present invention, as described in the detailed explanation of the invention, disconnection and short-circuiting of metal wiring does not occur. By depositing a semiconductor thin film, it is possible to completely fill the inside of the recess with the semiconductor thin film, and the surface can also be made flat, which also prevents the loading effect caused by dry etching, which is the main cause of unevenness. Ku
By using oxidation that can control the rate freely and has a stable rate, it is possible to use the difference in film thickness between the semiconductor thin film inside the recess and the rest of the recess to oxidize only the parts of the semiconductor thin film that you want to remove, except inside the recess. It is possible to embed a conductive thin film into a recess without impairing the flatness of the semiconductor thin film when it is deposited. Because it can be embedded in metal wiring, it is a new style of metal wiring and has the effect of preventing short circuits.

[Brief explanation of drawings]

FIG. 1 is a process cross-section showing a method for manufacturing an element isolation device according to a first embodiment of the present invention. FIG. 2 is a process cross-section diagram showing a method for manufacturing a polycrystalline silicon contact according to a second embodiment of the present invention. The figure is a cross-sectional view showing a process for manufacturing a contact between interlayer interconnects using polycrystalline silicon according to the third embodiment of the present invention. Figure 4 is a cross-sectional process view showing a method for forming element isolation in a conventional example. - Semiconductor base K 5... To separation 8... Non-doped polycrystalline silicon for embedding JIt9... Polycrystalline silicon embedded in isolation trench [10, 26, 35...
Oxide film 22...Diffusion@24.33...Polycrystalline silicon K 25...Polycrystalline silicon style buried in contact hole 27...Metal electric plate 31...First layer metal arrangement! 32... To interlayer insulation 34... Polycrystalline silicon melon embedded in through hole 36...
Name of second layer metal seed distribution agent Patent attorney Shigetaka Awano Haka1 Foam layer 1 Figure jlf2 Figure 2 Figure 3 Figure 3

Claims (2)

[Claims] (1) In a semiconductor device in which a recess is formed on one main surface of a semiconductor substrate, a step of depositing a semiconductor thin film having a thickness of at least 1/2 or more of the width of the recess on the semiconductor substrate; oxidizing the semiconductor thin film so that at least the semiconductor thin film on one main surface of the substrate other than the inner surface remains. (2) The method for manufacturing a semiconductor device according to claim 1, further comprising the step of forming a semiconductor thin film on a semiconductor substrate and then etching the semiconductor thin film to a desired thickness.