JPH02297992A - Printed wiring board - Google Patents

Abstract

PURPOSE:To form a by-pass condenser on a first conductive layer and a second conductive layer opposite part by forming the first conductive layer on a board, on which a circuit pattern has been formed, through a first insulating layer, and laminating a second insulating layer and the second conductive layer on the first conductive layer. CONSTITUTION:A circuit pattern is formed on the surface of a board 1, which pattern comprises signal patterns 20, 21, a ground pattern 3, and a power supply pattern. A first undercoating layer 4 comprising an insulating material is formed, leaving ground pattern 3 and a region B of part of the signal pattern 21, on which layer a shielding first conductive layer 5 is formed in a range not covering therewith the upper part of the circuit pattern 21. Then, an overcoating layer 6 comprising an insulating material is formed so as to cover the first conductive layer 5, and a second conductive layer 7 is formed on the upper region of the circuit pattern 21. thereafter, a second overcoating layer 8 is formed over the entire surface of the board. Thus, a capacitor formed on the region C acts as a by-pass condenser connected to the circuit pattern 21.

Description

DETAILED DESCRIPTION OF THE INVENTION (Al Industrial Field of Application) This invention relates to a printed wiring board used in electronic equipment, and more specifically relates to electromagnetic interference (EMI).
) This relates to a printed wiring board that takes measures against the above.

(b) Conventional technology In recent years, with the development of electronic devices, the speed and density of circuits formed on printed wiring boards have become faster and higher, and along with this, regulations regarding EMI have become stricter. ing. A typical EMI countermeasure that has been considered in the past is to reduce radiated noise and incoming noise by using a casing that houses a board as a shield case. However, with this method, there is a problem that the electromagnetic wave energy confined within the shielding case is radiated to the outside through the cable. Moreover, this method basically reduces the electromagnetic wave energy generated based on the high frequency characteristics of the circuit. Therefore, it is almost impossible to completely suppress radiated noise. So a new E
A printed wiring board for Mr countermeasures has been proposed. This wiring board is a board on which circuit patterns such as a signal line pattern (hereinafter simply referred to as a signal pattern), a ground line pattern (hereinafter simply referred to as a ground pattern), and a power line pattern (hereinafter simply referred to as a power supply pattern) are formed. An insulating layer is formed excluding at least a part of the ground pattern, and this insulating layer is then undercoated.
), on which a conductive layer is formed so as to be connected to the uninsulated part of the ground pattern.

Further, an insulating layer (hereinafter referred to as an overcoat layer) is usually further formed on this conductive layer.

In a printed wiring board having such a configuration, radiation noise can be reduced mainly for four reasons.

The first is to lower the impedance of the ground pattern using the conductive layer.

The second is the removal of high frequency components from the signal and power patterns by the close conductive layers.

That is, the undercoat layer is formed of a so-called solder resistor, but since this film is thin, about 20 to 40 μm, it is difficult to connect the signal pattern and power supply to the conductive layer formed thereon and connected to the ground pattern. The distributed capacitance of the pattern increases. Therefore, unnecessary high frequency components generated due to ringing etc. are grounded to the ground pattern in a high frequency manner, and radiation noise is suppressed.

Thirdly, the impedance of the signal pattern and the power supply pattern is made uniform by the conductive layer. That is, since the signal pattern and the power supply pattern are covered by the conductive layer, the distances between these circuit patterns and the conductive layer connected to the ground pattern are equalized, and the impedance of each circuit pattern is also equalized. As a result, the generation of a beam dance mismatch portion on high frequency transmission and the generation of unnecessary high frequency components due to it are suppressed. Yet another reason is the shielding effect of the conductive layer itself.

The above four reasons are effective in reducing radiated noise due to the low impedance of the ground pattern due to the conductive layer, the removal of high frequency components due to the close conductive layer, the uniformity of the impedance of the circuit pattern, and the normal shielding effect of the conductive layer itself. can be suppressed to

(C) Problems to be Solved by the Invention In general, a bypass capacitor (hereinafter referred to as a bypass capacitor) is appropriate for circuit boards to bypass unnecessary high-frequency components between the ground pattern and the circuit pattern or between the power supply pattern and the ground pattern. A few have been installed. However, in conventional printed wiring boards, this bypass capacitor is mounted on the board as a discrete component by soldering, which requires work to solder them, and the presence of the bypass capacitor makes the board smaller. There were problems that hindered the development of

Further, the lead wire of the bypass capacitor acts as an inductance for high frequencies, resulting in a problem in that the frequency characteristics of impedance deteriorate, as will be described later.

An object of the present invention is to provide a printed wiring board in which a conductive layer for shielding is laminated with an insulating layer in between to form a bypass capacitor in this portion.

(d) Means for Solving the Problem In the invention according to claim 1, there is provided a substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and the circuit pattern. a first insulating layer formed to cover the circuit pattern except for at least a part of either the ground line pattern or the power line pattern; a first conductive layer formed on the layer so as to be connected to an uninsulated portion of the ground line pattern or the power line pattern; and a second insulating layer and a first conductive layer formed on the first conductive layer. 2 conductive layers, and the second conductive layer is stacked.
Further, in the invention according to claim 2, a conductive layer is connected to any part of the circuit pattern. A circuit pattern including a line pattern, and a circuit pattern formed on a substrate on which the circuit pattern is formed so as to cover the circuit pattern except for at least a part of either the ground line pattern or the power line pattern. a first conductive layer formed on the first insulating layer so as to be connected to an uninsulated portion of the ground line pattern or the power line pattern; and the first conductive layer. A second insulating layer and a second conductive layer are further laminated thereon, and the second conductive layer is connected to either the power line pattern or the ground line pattern (IB ) Function In this invention, a second conductive layer is formed between the first conductive layer and the second conductive layer.
Because of the intervening insulating layer, a capacitor can be constituted by the first conductive layer and the second conductive layer.

Therefore, if the second conductive layer is connected to any part of the circuit pattern, the capacitor can be used as a bypass capacitor for the signal line, and when the first conductive layer is connected to the ground line pattern, the second conductive layer can be used as a bypass capacitor for the signal line. By connecting the conductive layer to the power supply line pattern, a bypass capacitor between the power supply and ground can be constructed in that part. This bypass capacitor is also formed when the first conductive layer is connected to the power line pattern and the second conductive layer is connected to the ground line pattern.

(f) Embodiment FIGS. 1A and 1B show a printed wiring board according to an embodiment of the present invention. First, a circuit pattern is formed on the surface of a substrate 1 made of a wA edge material such as epoxy resin, phenolic resin, glass fiber, or ceramics, as shown in the figure. The circuit pattern is signal pattern 2 (
20, 21), a ground pattern 3, and a power supply pattern (not shown). Each of these patterns is formed by a known photolithography technique. After forming the necessary patterns, the first undercoat layer 4 is formed leaving a part of the area A of the ground pattern 3 and a part of the area B of the signal pattern 21. This undercoat layer 4 is a solder resist layer made of a resin insulating material. It is preferable that the region A where the ground pattern 3 is exposed be formed at multiple locations on the substrate.
It is good to have at least one location. This undercoat layer 4
can be easily formed by screen printing. After forming the first undercoat layer 4, a first conductive layer 5 for shielding is applied thereon by screen printing. In this case, the first conductive layer 5 is formed on the right side of the figure, that is, on the upper surface of the first undercoat layer 4 in a range that does not cover the upper part of the circuit pattern 21.

The reason why the first conductive layer 5 is formed so as not to cover the upper part of the circuit pattern 21 as will be described later is that this first conductive layer 5 and the second conductive layer 7, which will be described later, This is to prevent contact.

The first conductive layer 5 is made of copper paste in this embodiment, and has the following composition, for example. In other words, it is basically made by mixing fine copper particles as a filler, a binder to firmly adhere the fine particles to each other, and various additives to maintain stable conductivity over a long period of time. Specifically, the following formulation is preferable.

(Blend Example 1) (A) 100 parts by weight of metallic copper powder, (B) 5 to 30 parts by weight of resol type phenolic resin, and (C) 0.1 to 0.1 to 30 parts by weight of dispersant.
2 parts by weight, 0.5 to 4 parts by weight of a chelating agent, and (0
) 001 to 5 parts by weight of an adhesion improver and (E) 0.5 to 7 parts by weight of a conductivity improver.

The metallic copper powder may have any shape such as flaky, dendritic, spherical, or irregular shape, and its particle size is preferably 100 μm or less, particularly preferably 1 to 30 μm.

Resol type phenolic resin is used to bind metal copper powder and other components well, and works effectively to maintain long-term conductivity.

As the dispersant, fatty acids or metal salts of fatty acids are desirable. Saturated fatty acids are preferably palmitic acid, stearic acid, arachidic acid, etc. having 16 to 20 carbon atoms, and unsaturated fatty acids are preferably seamaric acid, oleic acid, lylunic acid, etc. having 16 to 18 carbon atoms. As metal salts of fatty acids, salts of fatty acids as described above with metals such as sodium, potassium, copper, zinc, and aluminum are preferred.

These dispersants promote fine dispersion of the metallic copper powder into the resin mixture.

As the chelate forming agent, it is preferable to use at least one kind selected from aliphatic amines such as monoethanolamine, jetanolamine, triethanolamine, ethylenediamine, triethylenediamine, and triethylenetetramine. The chelate forming agent prevents oxidation of the metallic copper powder and contributes to maintaining conductivity.

Adhesion improvers include various adhesives.

As the natural resin type, rosin (gum type, tall oil type, wood type), rosin dielectric, terpene resin type, (terpene type, terpene phenol type), etc. are preferable. Synthetic resins include thermosetting ones such as petroleum resins, butyral resins, phenol resins, and xylene resins, thermoplastics such as vinyl acetate resin, acrylic resin, cellulose, and phenoxy resin, and recycled ones. Synthetic rubbers such as rubber, styrene-butadiene rubber, nitrile rubber, butyl rubber are preferred. These have the property of reducing the internal stress of the resol type phenolic resin that is the binder, or have a functional group (carboxyl group, hydroxyl group, long-chain alkyl group, etc.) that exhibits adhesive properties.

The conductivity improver is preferably one made of a nitrogen-containing compound or a heterocyclic compound having a phenyl group, particularly a compound that can exhibit conductivity through chemical oxidative polymerization or electrolytic polymerization.

Furthermore, regarding this formulation example, please refer to Japanese Patent Application No. 2-34-073.
2 is illustrated in detail.

(Blend Example 2) (A) 100 parts by weight of metallic copper powder, (B) melamine resin 3
5-50% by weight, polyester resin 20-35% by weight
and 10 to 25 parts by weight of a resin mixture consisting of 15 to 30% by weight of a resol type phenolic resin, and (C) 0.9% by weight of a dispersant.
It is formed by blending 1 to 2 parts by weight and 0.5 to 4 parts by weight of (D) the chelate forming agent.

In the above, preferred specific examples of the metallic copper powder, dispersant, and chelate forming agent and their effects are the same as in Formulation Example 1 above.

The melamine resin in the resin mixture is an alkylated melamine resin, and one selected from methylated melamine, butylated melamine resin, etc. is used.

The polyester resin in the resin mixture is a resin produced by polycondensation of a polyhydric alcohol and a polybasic acid, and includes alkyd resins, maleic acid resins, unsaturated polyester resins, and the like.

By making the resin mixture consist of 35 to 50% by weight of melamine resin, 20 to 35% by weight of polyester resin, and 15 to 30% by weight of resol type phenolic resin, metallic copper powder and other components can be well bound. , a conductive paint that maintains long-term conductivity, has good adhesion to copper foil, and has good solder heat resistance can be obtained.

Regarding this formulation example, please refer to Japanese Patent Application No. 62-32809.
A detailed example is given in No. 5.

After the first conductive layer 5 is applied, it is cured by heating, and a first overcoat layer 6 made of an insulating resin material is formed thereon so as to cover the first conductive layer 5. This first overcoat layer 6 can be made of the same material as the undercoat layer 4, and can be easily formed together with the first conductive layer 5 and the undercoat layer 4 by a printing process. After forming the first overcoat layer 6, a second conductive layer 7 is then formed in the upper region of the circuit pattern 21.This second conductive layer 7 is made of exactly the same material as the first conductive layer 5. It is formed by screen printing, and by forming it on the top of the circuit pattern 21, it becomes connected to the circuit pattern 21 in region B.The formation range of this second conductive layer 7 is only a part of it (the left side in the figure). ) is determined to have a size such that it faces a part of the first conductive layer 5. In the figure, the second conductive layer II 7 and the first conductive layer 5 face each other in a region C. is the second conductive layer 7 and the first conductive layer 5
A first overcoat layer 6 is sandwiched between the first overcoat layer 6 and a capacitor. After forming this second conductive layer 7, a second overcoat layer 8 is formed over the entire surface of the substrate. The second overcoat layer 8 is made of the same material as the first overcoat layer 6 and the undercoat layer 4 and has the above-mentioned configuration formed by the same printing process. The second conductive layer 7 faces each other with the first overcoat layer 6 in between, and a capacitor is formed in this portion. Since the second conductive layer 7 is connected to the circuit pattern 21 in the region B, the capacitor formed in this region C functions as a bypass capacitor connected to the circuit pattern 21. Here, the thickness of the first overcoat layer 6 is 2
Since the capacitance is formed as thin as approximately 0 to 40 μm, the capacitance of the bypass capacitor formed in this portion C is sufficient to function as a bypass capacitor.Moreover, the first conductive layer 5
Since the area where the second conductive layer 7 and the second conductive layer 7 face each other can be freely changed by designing the screen mesh layout, it is possible to form both a small capacitance bypass capacitor and a large capacitance bypass capacitor very easily.

As mentioned above, when comparing the case where a bypass capacitor is formed by the first conductive layer and the second conductive layer and the case where a bypass capacitor is used as a discrete component as in the past, the following is shown. There are such differences.

First, when using a decapacitor as a discrete component as in the past, if the two lead wires of the decapacitor are both metal wires with a length of 5 fl and a diameter of 0.6 m, the inductance of the lead wire is calculated by equation (1). Can calculate.

11 Kai α□−v−1) [)−0・−・・(1) However, μ: Magnetic permeability of the metal wire (−4πX 10−′ (H/m)) l: Length of the lead wire − 5X 10"3 (m, )) r: Radius of lead wire (=0.3xl O-3 [, m)) In other words, inductance per lead wire -2,
51x to-4f-HJ Now, set the capacitance (C) of the bypass capacitor itself to 330 x 10”
CF), the series impedance Z composed of the inductance of the two lead wires is calculated from equation (2).

However, f: Frequency [H2] Now, if we calculate the impedance at f = 100MHz, next, when forming a bypass capacitor with the first conductive layer and the second conductive layer, only the capacitance is If you think about it, impedance Z is calculated from equation (3). However, ε. ; Dielectric constant of vacuum (8,854*10-" CF/m)) ε; Relative dielectric constant S of undercoat layer: Opposing area of conductive layer of connector land [m!] d ; Thickness of undercoat layer (m) now gr =5
．． S=2cm", d=30μm, °, Z・5.40r
Similarly to Ω and C, the frequency characteristics of impedance from 10 MHz to 100,100 O are calculated for both, and plotted on a log-log graph as shown in FIG.

In FIG. 3, the horizontal axis represents frequency (MHz) and the vertical axis represents impedance (Ω), where IZAI represents the frequency characteristic of the absolute value of the impedance of the conventional example and Izal represents the frequency characteristic of the absolute value of the impedance of the embodiment.

Note that 1zAcl and IZALI respectively represent the frequency characteristics of the absolute value of impedance due to the capacitance of the main body of the bypass capacitor and the inductance of the lead wire in the conventional example.

As is clear from FIG. 3, in the conventional example, as the frequency increases, the impedance due to the inductance of the lead wire increases, and since this is added, the overall impedance ZA also increases above 100 MH2. .

On the other hand, since the bypass capacitor of the embodiment has no inductance, the higher the frequency, the lower the impedance, so it is extremely effective as a bypass capacitor.

In the above embodiment, an example was shown in which a bypass capacitor was formed between the circuit pattern 21 and the ground pattern 3, but the first
The conductive layer 5 may be connected to the power supply pattern instead of the ground pattern 3. Even with this configuration, the configuration of the area C remains unchanged and a bypass capacitor with the required capacity can be obtained. be able to.

FIG. 2 shows an example in which a bypass capacitor is formed between a power supply pattern and a ground pattern. The difference in configuration from the wiring board shown in FIG. 1 is that the portion to which the second conductive layer 7 is connected is replaced by a power supply pattern 9 instead of the circuit pattern 21.

The rest is the same.Also, the first conductive layer 5 may be connected to the power supply pattern 9, and the second conductive layer 7 may be connected to the ground pattern 3.In either case, In region C, a bypass capacitor is formed to absorb high frequency noise between the power supply and ground patterns.

(g1 Effect of the Invention According to this invention, the first conductive layer reduces the conventional EMI
It is possible to obtain the same radiation noise suppression effect as the countermeasure printed wiring board, and moreover, by using the first conductive layer and laminating the second insulating layer and the second conductive layer thereon. , a bypass capacitor can be formed in the opposing portion of the first conductive layer and the second conductive layer, and therefore, it is possible to achieve the effect of suppressing radiation noise and to reduce the size of the wiring board. Furthermore, since no lead wire is required, there is no inductance component, and excellent frequency characteristics can be obtained as a bypass capacitor. Furthermore, since all the insulating layers and conductive layers can be formed by the well-known screen printing method, there is an advantage that the manufacturing process can be greatly simplified.

[Brief explanation of the drawing]

1 and 2 show cross-sectional views of a printed wiring board according to an embodiment of the present invention. FIG. 3 shows the impedance frequency characteristics of the conventional example and the example. 1 - substrate, 2 (20, 21) - circuit pattern, 3 - ground pattern, 4 - first insulating layer (undercoat layer), 5 - first conductive layer, 6 - second insulating layer (first overcoat [), 7-second conductive layer, 8-second overcoat layer, 9-power pattern.

Claims (2)

[Claims] (1) A substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and the ground line pattern or the power line pattern formed on the substrate on which the circuit pattern is formed. a first insulating layer formed to cover the circuit pattern except for at least a part of one of them; and an insulating layer of the ground line pattern or the power line pattern on the first insulating layer. a first conductive layer formed so as to be connected to the non-conductive portion; and a second insulating layer and a second conductive layer further laminated on the first conductive layer, and the second conductive layer is connected to any part of the circuit pattern. (2) A substrate, a circuit pattern including a ground line pattern and/or a power line pattern and a signal line pattern formed on the substrate, and the ground line pattern or the power line pattern formed on the substrate on which the circuit pattern is formed. a first insulating layer formed to cover the circuit pattern except for at least a part of one of them; and an insulating layer of the ground line pattern or the power line pattern on the first insulating layer. a first conductive layer formed to be connected to the non-conductive portion; a second insulating layer and a second conductive layer further stacked on the first conductive layer; A printed wiring board, characterized in that the printed wiring board is connected to either the power line pattern or the ground line pattern.