AU648943B2 - Printed circuit board - Google Patents

Description

Regulation 3.2

AUSTRALIA

Patents Act 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT

(ORIGINAL)

648943 Name of Applicant: Address for Service: Invention Title: TATSUTA ELECTRIC WIRE CABLE CO., LTD DAVIES COLLISON CAVE, Patent Attorneys, 1 Little Collins Street, Melbourne, 3000.

"PRINTED CIRCUIT BOARD" The following statement is a full description of this invention, including the best method of performing it known to us: -1 930129,p:\oper\dh49200.div,1 la- BACKGROUND OF THE INVENTION (Field of the Invention) This invention relates to a printed circuit board to be used in electronic equipment, in particular a printed circuit board which has electromagnetic interference (EMI) preventing means.

(Description of the Prior Art) The recent progress of electronic equipment is facilitating the trend toward an increase of operation speed and.density of a circuit formed as a printed circuit board, as a result of which regulations are becoming more severe. One of the typical 15 EMI preventing means which is conventionally applied, reduces the radiation noise and incoming noise by covering a printed circuit board with a shield case.

o However, this method causes a problem that the electromagnetic wave energy enclosed in the shield case is emitted outwards through cables. Moreover, this method is not basically intended to reduce the electromagnetic wave energy which is generated due to high frequency characteristics of the circuit. Therefore it is almost impossible to completely suppress the radiation noise. Hence, a new printed circuit board for reducing EMI has been proposed (USP4,801,489). This printed "circuit board features an insulation layer (hereinafter this insulation layer is called 25 the undercoat layer) which is formed, excepting at least a part of a ground pattern, on a substrate on which a signal line pattern (hereinafter referred to as signal pattern), a ground line pattern (hereinafter referred to as ground pattern) and a power line pattern (hereinafter referred to as power supply pattern) are formed, and a conductive layer such as conductive paste layer is formed thereon so as to be connected to an uninsulated part of the ground pattern.

930129,p: \oper\db492div.s, 1 -2- Usually, another insulation layer (hereinafter referred to as overcoat layer) is formed on this conductive layer.

Radiation noise can be reduced in the printed circuit boards of such a configuration mainly for the following four reasons.

Firstly, reduction of ground pattern impedance by conductive layer.

Secondly, removal of high frequency component from signal pattern and power supply pattern by adjacent conductive layer. That is, since the undercoat layer which is formed with so-called solder resist is thin, about 20 to 40 pm in thickness, the distributed electrostatic capacity of the signal pattern and power supply pattern with respect to the conductive layer which is formed thereon and connected to the ground pattern is significant. Accordingly, unnecessary high frequency component which is generated by ringing is grounded to the ground pattern with high frequency, so that the radiation noise is suppressed.

Thirdly, equalisation of impedance of signal pattern and power supply pattern S: by conductive layer. That is, since the signal pattern and power supply pattern are covered by the conductive layer, the distance between these circuit patterns and the conductive layer connected to the ground pattern is equalised, and the impedance of each circuit pattern is equalised. As a result, impedance mismatch in high frequency transmission and generation of unnecessary high frequency component which is caused thereby are suppressed.

Another reason is a shield effect by conductive layer itself.

Owing to these four reasons, that is reduction of impedance of ground pattern by conductive layer, removal of high frequency component by adjacent conductive layer, equalisation of impedance of circuit pattern and ordinary shield effect of conductive layer itself, the radiation noise can be effectively suppressed.

930127,p:\oper\dh,492dim.spe,2 -3- However, in the conventional printed circuit board employing conventional EMI preventing means, the width of the ground pattern lead to the IC ground pattern is small, so that the impedance at high frequency is high, resulting in occurrence of potential difference along its length and, thereby, an unstable ground level of IC. As a result of fluctuation of this ground level, radiation noise is generated in the output signal of the IC. Due to this, sufficient effect of EMI preventing means cannot be obtained.

Usually, in the electronic circuit board, a bypass capacitor to bypass high frequency noise is provided on the connector located at the end of substrate, power supply terminal and ground terminal. The required function of this bypass capacitor is to bypass the unnecessary high frequency component. Therefore a bypass capacitor of relatively small capacitance is used. In the conventional printed circuit board, this bypass capacitor is mounted on the substrate as a discrete part.

Therefore soldering is required to mount the capacitor on the substrate, which impedes reduction of size of the substrate. Moreover, the lead wire of the bypass capacitor causes inductance at high frequency, as a result of which the frequency characteristics of impedance are degraded.

In the conventional printed circuit board the conductive layer is formed on the undercoat layer, the conductive layer is formed only around IC excepting the part just below IC. Therefore the effect of conductive layer could not be sufficiently utilized.

25 As a result of persistent examination and tests of above-mentioned printed circuit boards it has been revealed that sufficient effect cannot be obtained as to reduction of radiation noise (high frequency noise) of electromagnetic wave for some shapes of signal pattern included in the circuit pattern. There is a problem that if the interior angle of a bent part of the signal pattern is near 90 the radiation noise reduction effect cannot be obtained sufficiently. The reason is as yet unknown. It is assumed that the impedance mismatching occurs in the bent part, resulting in generation of reflected wave, which causes an increase of equivalent high frequency 930 27,p:\opcr\d492div.sp,3 -4impedance. Especially, for the fine pitch high integration circuit board, CAD is used for designing the circuit pattern. Most of circuit boards having the circuit pattern which has been designed with the aid of this support device feature that the bent part of signal pattern has an angle of 90°. As the rule of wire width and pitch of signal line of such a board is made more strict, the radiation noise becomes more noticeable.

The layout of printed circuit board is varied depending on uses. Hence, in some cases the sufficient ground pattern area to connect a conductive layer cannot be provided.

In these cases the area to connect the ground pattern and the conductive layer is small, and high frequency impedance is increased, resulting in reduction of effect. To prevent potential difference in the ground circuit, it is desirable to connect the ground pattern and the conductive layer in several places. If such a connection is impossible owing to restriction of layout, the requirement to EMI could not be satisfied sufficiently.

SUMMARY OF THE INVENTION In accordance with the present invention there is provided a printed circuit board, comprising: ee a substrate; 20 a circuit pattern formed on the substrate, the circuit pattern including a signal line pattern and a reference potential setting line pattern in which a reference potential is set for the signal line pattern; an insulation layer which is formed on the substrate so as to cover the circuit pattern excepting at least a part of the reference potential setting line pattern; a conductive layer which is formed on the insulation layer so as to be connected to an uninsulated part of the reference potential setting line pattern; and a conductive part which is formed separately from the circuit pattern and which is separated from the conductive layer by the insulation layer; wherein the conductive layer extends adjacent the conductive part so as to form a bypass capacitor between the conductive part and a part of the conductive layer opposite to the conductive part.

940301,p:\opc&i"t UaI 2.w,4 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 and Fig. 2 show a cross section of printed circuit board.

Fig. 3 and Fig. 4 show circuit boards in accordance with the present invention.

Fig. 5 shows impedance vs. frequency characteristics.

Fig. 6 and Fig. 7 illustrate printed circuit boards in accordance with another aspect of the present invention.

Fig. 8(A) and Fig. 8(B) shows a cross section of another printed circuit board.

Fig. 9 shows the radiation noise reduction effect resulting from application of conductive paste between IC pins on a printed circuit board.

Fig. 10(A) shows a cross section of another printed circuit board in accordance with the present invention.

Fig. 10(B), Fig. 10(C) and Fig. 10(D) show part of a signal line pattern.

Fig. 11 explains the effect of printed circuit board which conforms to this example.

Fig. 12 shows a cross section of another printed circuit board.

Fig. 13 shows the effect on radiation of a printed circuit board which is formed in accordance with the example shown in Figure 12.

DESCRIPTION OF THE PREFERRED EMBODIMENT

I

Fig. 1 shows a cross section of printed circuit board. A circuit pattern 2 made of copper foil is formed on the upper surface of a substrate 1 which is composed of a insulation material such as epoxy resin, phenol resin, glass fiber or ceramics. This 25 circuit pattern 2 includes a signal pattern 20, a ground pattern 21, a power supply pattern 22, an IC ground pin connection land 23 and an IC signal pin connection land 24. Reference numeral 3, in this figure, represents through holes. The area of IC ground pin connection land 23 included in the circuit pattern is larger by several times than the area of IC signal pin connection land 24. It is desirable that this IC ground pin connection land has the largest possible area (as allowed by the pattern layout). These patterns are formed by the known photolithography.

930127.p:\opr\dh492div.sp,5 1 -6- After formation of the required pattern, an undercoat layer 4 is formed, leaving a partial area A of ground pattern 21, and a partial area B of IC ground pin connection land 23. This undercoat layer 4 is a solder resist layer made of resin insulation material. The undercoat layer 4 can be easily formed by screen printing.

After the undercoat layer is formed, a conductive paste layer 5 is formed thereon by screen printing. In this example the conductive layer is made of copper paste and is formed so as to cover almost the whole surface of the undercoat layer 4. The material, for example, of the following composition, can be used for the copper paste. Other comp6sitions are also applicable.

Basically, the copper paste is made by mixing the fine copper particles which serve as filler, binder designated to bond reliably these particles and various additives to maintain the conductivity stably for a long time. Concretely, it is prepared by mixing 100 wt. portion of metal copper powder, 10 to 25 wt. portion of resin mixture (consisting of 35 to 50 wt. of melamine resin, 20 to 35 wt. of polyester resin, and 15 to 30 wt. of resolve type phenol resin), 0.5 to 2 wt. portion of fatty acid or its metallic salt and 0.5 to 4 wt. portion of chelate forming agent.

:e Metallic copper powder of flake, resin, spheric or amorphous type can be used. It is desirable that particle diameter be less than 100 pm, especially 1 to 30 Pm.

After the conductive paste 5 is applied, it is heated to cure. Then the overcoat layer 6 made of insulation resin material is formed on the whole surface of conductive paste layer 5. This overcoat layer 6 can be made of the same material as that of undercoat layer 4. The conductive paste layer 5 and the undercoat layer 25 4 can be easily formed by printing.

In the composition mentioned-above the conductive paste layer 5 is directly connected to the IC ground pin connection land 23, so that the potential of this IC ground pin is stabilised, and the generation of radiation noise by potential fluctuation is suppressed. As shown in Fig. 1. the IC ground pin connection land 23 is formed with wider area than that of IC signal pin connection land 24. Therefore impedance at the point of connection to the conductive paste layer 5 can be reduced more so 930127,p:\oper\dhA92div.spC,6 -7that the radiation noise suppression effect can be enhanced.

In the example shown in Fig. 1, the conductive paste layer 5 and the overcoat layer 6 are formed only on the surface of substrate 1. As a matter of course, it is desirable to form these layers also on the rear side of substrate 1. As the conductive paste layer 5 connection areas A and B are increased, the suppression effect is enhanced.

Fig. 2 shows a 2nd example of a printed circuit board. Its composition differs from that of the printed circuit board shown in Fig. 1 in that the IC pin connection land to be connected to the conductive paste layer 5 is IC power supply pin connection land 25 and that the part to be connected to the conductive paste layer is part of power supply pattern. Other parts are all the same as those shown in Fig. 1. Although the printed circuit board has such a composition, the reference potential of IC is stabilised at the IC power supply pin. Accordingly, the same suppression effect as that obtained on the printed circuit board shown in Fig. 1 can be obtained.

In the first example mentioned above, the IC ground pin is directly connected to the conductive layer through the land. Therefore, the radiation noise suppression effect can be enhanced more as compared to the conventional EMI-prevented printed circuit board which is designed so that the IC ground pin is connected indirectly to the conductive layer through the ground pattern of substrate. The :above-mentioned effect can be more enhanced by widening the area of IC ground 25 pin connection land.

When the conductive layer cannot be connected to the ground circuit owing

S

to restriction of layout but a sufficient area to connect it to the power supply pattern can be provided, the same EMI suppression effect as that of printed circuit board where the conductive layer is connected to the ground pattern can be obtained by connecting the above-mentioned conductive layer to this power supply pattern.

Accordingly, even on the printed circuit board where the power supply pattern is 930127,p:\opcr\d492div.spc,7 -8connected to the conductive layer the EMI suppression effect can be obtained by increasing the area for IC power supply pin connection.

Fig. 3 shows a printed circuit board in accordance with the present invention.

Fig. 3(A) shows the X-X' cross section. Fig. 3(B) shows the plan. At first, the circuit pattern shown in the figure is formed on the surface of substrate 1 which is made of insulation materials such as epoxy resin, phenol resin, glass fiber or ceramics. The circuit pattern includes signal pattern 20, ground pattern 21, and power supply pattern (not shown in the figure). In this example of embodiment, a connector land 8 to which the connector is connected is formed, in addition to this circuit pattern, at the end of substrate 1 with a wider area than that of ordinary connector land 8a, at the same time when the circuit pattern is formed. These patterns are formed by the well known photolithography.

After the required patterns are formed, an undercoat layer 4 is formed, leaving a partial area A of ground pattern 21. This undercoat layer 4 is a solder resist layer made of resin insulation material. It is desirable that the area A where the ground pattern 21 is exposed is formed at several places on the substrate. At 0* least one place is required. This undercoat layer 4 is formed by screen printing so that the upper side of connector land 8 is also covered together with the abovementioned circuit pattern. After the undercoat layer 4 is formed, the conductive layer 5 for shield is formed thereon. This conductive layer 5 is also formed by printing on the undercoat layer 4 so as to cover the upper side of connector land 8 "o together with the above-mentioned circuit pattern. In this example of embodiment 25 this conductive layer 5 is made of paste.

After the conductive layer 5 is applied, it is heated to cure, and then an 0 overcoat layer 6 made of insulation resin material is formed on the whole upper surface of conductive layer 5. This overcoat layer 6 can be made of the same material as that of undercoat layer 4. It is easily formed by printing together with conductive layer 5 and undercoat layer 4.

930127,p:\opr\dh,492d.spc,8 -9- In the composition mentioned above, the area C where the connector land 8 and the conductive layer 5 located above it are overlapped composes a capacitor at both sides of undercoat layer 4. Since the thickness of undercoat layer 4 is about to 40 pm, the capacity necessary for bypass capacitor can be obtained at the area C having a proper area. Accordingly, the required bypass capacitor can be formed by composing the capacitor section as the area C shown in Fig. 3(A) for all the connector lands connected to each signal pattern without solder-connecting the bypass capacitor as a discrete part.

Thus, two cases are compared (in one case the connector land and the conductive layer compose the bypass capacitor, in other case the bypass capacitor is used as a discrete part according to the conventional method). There are following differences between them.

15 At first, when the bypass capacitor is used as a discrete part according to the conventional method, inductance L of lead wire can be calculated by using the formula assuming that length and diameter of two lead wires (metal wires) of bypass capacitor are 5 mm and 0.6 mm, respectively.

L= '(ln (1) r 20 where p: magnetic permeability (=4rtx 10* 7 1: length of lead wire %so" 25 x 10 3 r: radius of lead wire 0.3 x 10 3 930127,p:\oper\dh.492div-spe9 Accordingly, inductance of one lead wire is: 4II x 10- 7 x 5 x 10- 3 2 x 5 x 10- 3 L (in [HJ 211 0.3 x 10- 3 2.51 x 10- 9

[H]

Assuming that the electrostatic capacity of bypass capacitor is 330 x 10" 1 2 the series impedance Z consisting of the capacitance and inductance of two lead wires can be calculated by using the formula 1 Z 2HrfL x 2 (2) 2Hrfc where f: frequency (Hz) SThe impedance at f 100 MHz is calculated as follows: Z 1 21 x2 x 100 x 10 6 211 x 100 x 106 x 330 x 10- 12 x 2.51 x 10-9 4.82 3.15 1.67 [0] In the case when a bypass capacitor is composed of connector land and S 15 conductive layer, it is sufficient to consider only the electrostatic capacity. Therefore, the impedance Z can be obtained from the formula 1 1 Z (3) 2rfc eo r

S

2nF d where Eo: dielectric constant of vacuum 930127,p:\operdh,492divps,10 11 (8.854 10 1 2 er: relative dielectric constant of undercoat layer S: opposite area of connector land and conductive layer (m 2 d: thickness of undercoat layer (m) Assuming that er 5, S 2 cm 2 and d 30 pm, we get: 8.854 x 10- 1 2 x 5 x 2 x x 10-6 2.95 x 1010' [F] Z 5.40 [n] Similarly, the frequency characteristics of impedance from 10 MHz to 1000 S MHz are calculated for both and obtained data are plotted in the logarithmic graph S: (Fig. In Fig. 5, the abscissa shows frequency f (MHz) whereas the ordinate shows the absolute value of impedance IZ I IZA I and IZ, I represent the frequency characteristics of impedance, representatively of the conventional example and of the example of embodiment. IZAC I and IZA I represent the frequency characteristics i of the absolute value of impedance, respectively caused by electrostatic capacity of the bypass capacitor and caused by inductance of the lead wire of the conventional example.

As is evident from Fig. 5, in the conventional example, the absolute value of the impedance caused by the inductance of lead wire increases as the frequency increases. Owing to successive addition of increase, the absolute value of the impedance IZA I also increases at frequency of 100 MHz or more.

In the embodiment of the present invention, the bypass capacitor does not have inductance. Accordingly, the impedance decreases as the frequency increases.

930 W,p:\opr\dh.492diVspc,l1 -12- Therefore this feature is most useful for the bypass capacitor.

The example shown in Fig. 3 represents a bypass capacitor between connector land 8 and conductive layer 5. Since the power terminal land is formed at the end of substrate 1, a bypass capacitor can be formed between this power terminal land and conductive layer 5. The effect can be also enhanced by using further the bypass capacitor as discrete part.

In the experiment of embodiment shown in Fig. 3, the conductive layer 5 is connected to the ground pattern 21. It is allowed to connect the conductive layer to the power supply pattern in place of ground pattern 21.

Fig. 4 and Fig. 4(B) show the examples. That is, when the undercoat layer 4 is formed by printing, a part of power supply pattern 22 is left and the conductive layer 5 is formed by printing thereon, so that the potential of conductive layer 5 can be set to power supply voltage. As a result, in the area C a bypass capacitor is formed between the connector land 8 and the power source.

Nevertheless, since the power supply impedance can be ignored at high frequency, the same high frequency noise (radiation noise) suppression effect as that obtained 20 in the example of embodiment shown in Fig. 3 can be obtained. In the example of embodiment shown in Fig. 4, the bypass capacitor can be also formed between ground terminal land and conductive layer.

As shown in Fig. 3 and Fig. 4, the same effect can be obtained by connecting the conductive layer 5 either to the ground pattern 21 or to the power supply pattern 22. Therefore, in the case when the power supply pattern and ground pattern is restricted in the layout of substrate, it is possible to select more effective pattern which is connected to the conductive layer 5 from the viewpoint of high frequency noise suppression effect.

In the experiment of embodiment mentioned above there is no need to mount additionally capacitor on the substrate by soldering.

930127,p:\opcr\dh,492div.Sp c 12 -13- Therefore the size of printed circuit board can be reduced. Moreover, since lead wires are not required, inductance does not occur, which can be obtained, the excellent frequency characteristics of bypass capacitor. In this invention, formation of bypass capacitor requires merely extension of insulation layer and conductive layer. Therefore there is no need to increase the printing process. Accordingly, high workability is ensured, and production cost does not increase.

Fig. 6(A) and Fig. 6(B) show a printed circuit board which is also another example of embodiment of this invention. The circuit pattern 2 shown in the figure is at first formed on the surface of substrate 1 made of insulation material such as epoxy resin, phenol resin, glass fiber or ceramics. The circuit pattern includes the signal patterns 20 and 20', ground pattern 21 and power supply pattern (not shown).

These patterns are formed by using the well known photolithography. After the S. required patterns are formed, the first undercoat layer 4 is formed, leaving the partial area D of signal pattern 20' and the partial area A of ground pattern 21.

This undercoat layer 4 is solder resist layer made of resin insulation material. It is desirable that the area A where the ground pattern 21 is exposed is formed on several places of substrate. At least one place is required. This undercoat layer 4 can be easily formed by screen printing. After the first undercoat layer 4 is formed, 20 the first conductive layer 5 for shield is formed by screen printing thereon. In this case the first conductive layer 5 is formed on the upper surface of the first undercoat layer 4 in the right side range shown in the figure, namely in the range not covering the upper part of signal pattern 20'. The reason why the first conductive layer 5 is formed so that the upper part of signal pattern 20' is not covered is that contact of S* 25 the first conductive layer 5 to the second conductive layer 9 on the signal pattern must be avoided, stated later.

The first conductive layer 5 mentioned above is made of copper paste.

After applying the first conductive layer 5 it is heated to cure, and then the first overcoat layer 6 made of resin insulation material is formed so as to cover the first conductive layer 5. The first overcoat layer 6 can be made of the same material 930127.p:oper\d492div.Spe,l3 -14as that of undercoat layer 4. It can be easily formed by printing together with the first conductive layer 5 and undercoat layer 4. After the first overcoat layer 6 is formed, the second conductive layer 9 is formed in the area at the upper part of the above-mentioned signal pattern 20. This second conductive layer 9 is formed at the upper part of signal pattern 20' by screen printing, using the same mateial as that of the first conductive layer 5. Accordingly, it is connected to the signal pattern in the area D. The formation range of the second conductive layer 9 is specified so that its part (left side in the figure) is located opposing to a part of the first conductive layer 5. In the figure the second conductive layer 9 is opposed to the first conductive layer 5 in the area C. In this area C the first overcoat layer 6 is sandwiched between the second conductive layer 9 and the first conductive layer thereby forming a capacitor in this part. After the second conductive layer 9 is formed, the second overcoat layer 10 is formed on the whole surface of substrate.

This second overcoat layer 10 is formed by using the same printing process and the same material as those applied for the first overcoat layer 6 and undercoat layer 4.

V.i In the composition mentioned above, the first conductive layer 5 and the second conductive layer 9 in the area C are opposed to each other through the first overcoat layer 6, and a capacitor is formed in this part. The first conductive layer 20 5 is connected to the ground pattern 21 in the area A, and the second conductive layer 9 is connected to the signal pattern 20' in the area D. Therefore the capacitor formed in this area C serves as a bypass capacitor connected to the signal pattern Since the thickness of the first overcoat layer 6 is extremely small (20 to apm), the bypass capacitor which is formed in the area C has a sufficient capacity 25 required for bypass capacitor. Since, moreover, the opposing area of first conductive layer 5 and second conductive layer 9 can be easily changed by designing the screen mesh layout, the bypass capacitor having small capacitance and the bypass capacitor having large capacitance can be easily formed.

Above is shown an example of embodiment where the bypass capacitor is formed between signal pattern 20' and ground pattern 21. It is also allowed to connect the first conductivw ayer 5 to the power supply pattern in place of ground 930127,popr\dh,492div.spe, 14 pattern 21. Even in this configuration the composition of area C does not change.

The bypass capacitor having required capacitance can be obtained.

Fig. 7 shows an example of formation of a bypass capacitor which is formed between the power supply pattern and the ground pattern. The difference between printed circuit boards shown in Fig. 6 and Fig. 7 in their configuration is that the second conductive layer 9 of printed circuit board is connected to the power supply pattern 22, not to the signal pattern 20'. This is only one difference. Others are all the same. It is also allowed to connect the first conductive layer 5 to the power supply pattern 22 and the second conductive layer 9 to the ground pattern 21. In any case a bypass capacitor to absorb the high frequency noise between the power supply source and the ground pattern is formed in the area C.

In the example of embodiment shown above, the same radiation noise suppression effect as that obtained on the conventional EMI-prevented printed circuit board can be obtained owing to existence of first conductive layer. Moreover, if the second insulation layer and the second conductive layer are laminated on the first conductive layer, a bypass capacitor can be formed in a par ere the first conductive layer is opposed to the second conductive layer. Theret,. the radiation noise suppression effect is ensured and at the same time the size of printed circuit board can be reduced. Since the lead.wires are not required, inductance does not occur, so that excellent frequency characteristics of bypass capacitor can be obtained.

Moreover, since all the insulation layers and conductive layers can be formed by using the known screen printing process, the production process can be remarkably simplified.

Fig. 8(A) and Fig. 8(B) show the cross section of the vicinity of IC mount part of a circuit board.

Fig. 8(A) and Fig. 8(B) shows Y-Y' view cross section and X-X' view cross section, respectively.

930127,p:\oper\d,492div.spe1i5 -16- The circuit pattern 2 shown in the figure is formed on the surface of the substrate 1 made of insulation material such as epoxy resin, phenol resin, glass fiber or ceramics. At first the circuit pattern 2 shown in the figures is formed. This circuit pattern 2 includes the signal pattern, ground pattern, power supply pattern and through-hole copper foil parts. These patterns are formed by the known photolithography. After the necessary patterns are formed the undercoat layer 4 is formed, leaving the partial area of ground pattern which is not shown in the figure and the land (IC pin land part) 2a of through-hole 11 which is used to insert the IC pin. This undercoat layer 4 is solder resist layer made of resin insulation material.

It can be formed easily by screen printing. After the undercoat layer 4 is formed, the conductive paste layer 5 similar to the conductive layer of peripheral part 9 is formed by screen printing on the place 12 just under IC on the undercoat layer 4 so that the peripheral part 9 and the place 12 are successive. In this case the masking part to be used is IC pin land 2a and a clearance is formed between adjacent pin lands 2a. The conductive paste layer 5 is heated to cure. Then the overcoat layer 6 made of insulation resin material is formed on the whole surface of substrate 1, leaving the land part 2a of IC pin. The overcoat layer 6 can be made of the same material as that of undercoat layer 4. The conductive paste layer 5 and the undercoat layer 4 can be easily formed by printing process.

In the composition shown above, the conductive paste layer 5 is formed as shown in Fig. 8(B) so that it does not contact the IC pin land 2a in the area between IC pin insertion holes. Therefore unnecessary high frequency component which is generated in this part can be reduced, so that the radiated noise can be suppressed.

In this example of embodiment, the undercoat layer 4, the conductive paste layer 5 and the overcoat 6 can be easily formed by the conventional screen print.

Accordingly, the EMI prevented printed circuit board can be easily made without using complicated process. Moreover, since the above-mentioned conductive paste layer is formed between the IC pin insertion hzles, namely between through-holes, unnecessary high frequency component which is generated in this part can be rediiced, so that the radiation noise can be suppressed. Especially, for the IC pin to 930127,pAopcrtdhbA92div.spe,16 -17 which clock or pulse signal is always supplied, the composition described in this example is useful from the viewpoint of reduction of high frequency noise. Fig. 9 shows a graph where abscissa shows percentage of treatment of area between IC pins of printed circuit board, namely percentages of conductive paste layer which is formed in all the areas between IC pins and ordinate shows the radiation noise reduction effect. As is evident from this figure the radiation noise reduction effect is enhanced if the treatment of area between IC pins is increased. Accordingly, it is better to increase the treatment of area between IC pins. Even when the conductive paste layer is formed on 1/4 area of all areas between IC pins, radiation suppression effect of about 7 dB is obtained.

It is better to form successively the undercoat layer 4, the conductive paste layer 5 and the overcoat layer 6 also on the rear surface of the substrate although it is not shown in Fig. 8. In this example the connection point of conductive paste layer 5 is assumed to be the ground pattern. The same effect can be obtained when the connection point of the conductive paste layer 5 is provided on the power supply pattern.

In this example, a part of conductive layer is formed also between IC pin 20 insertion holes. Therefore the unnecessary high frequency component which is generated in this part, namely radiation noise, can be suppressed. Especially, on the printed circuit board the radiation noise is generated frequently on the IC pin since clock and pulse signal are always supplied to this part. Also, ordinary screen print •process can be applied for production. Only the conductive layer arrangement pattern must be changed. Therefore the production cost is not raised.

Fig. 10 shows a printed circuit board which is still another example of embodiment of this invention. First, the circuit pattern as shown in the figure is formed on the surface of substrate 1 made of insulation material such as epoxy resin, phenol resin, glass fiber or ceramics. The circuit pattern includes the signal pattern and the ground pattern 21. These patterns are formed by well known photolithography. After the required patterns are formed, the undercoat layer 4 is 930127,p:\opecrdh492div.spe.17 -18formed, leaving partial area A of the ground patter 21. This undercoat layer 4 is solder resit layer made of resin insulation material. It is desirable that the exposed area A of the ground pattern 21 is formed on several places on the substrate. It must be formed at least on one place. This undercoat layer 4 can be formed easily by screen print. After the undercoat layer 4 is formed the conductive paste layer for shield is formed by screen print. In this example of embodiment this conductive paste layer 5 is made of copper paste and covers almost the whole area of the undercoat layer 4.

After the conductive paste layer 5 is applied, it is heated to cure. And then the overcoat layer 5 made of insulation resin material is formed on the whole upper surface of the substrate 1. This overcoat layer 6 can be made of the same material as that of the undercoat layer 4. It can be easily formed by the printing process together with the conductive paste layer 5 and the undercoat layer 4.

o As shown .n Fig. 10(B) the signal pattern 20 is wholly arranged so that the interior angle of bent part B is set to approx. 135 If the pattern of each signal line is set to 135 as shown in the figure, signal reflection at the bent part B is reduced, so that increase of high frequency impedance is prevented. Accordingly, as 20 compared to conventional arrangement where the bent part B is set at a right angle, generation of radiation noise (high frequency noise) is less. Although suppression of high frequency noise generation at one bent part B is insignificant, significant effect is obtained if all the effects are summarised since one substrate usually has many signal line bent parts. The result of experiment shown that if the interior angle of this bent part is less than 135 0, the effect reduces, but at wider angle than 135 0 almost the constant effect is obtained. If the interior angle of bent part is larger than 135 as shown in Fig. 10(B), the specified effect can be obtained. It has been proved that the effect can be obtained by giving R (give circular arc to the bent part B) to the bent par B as shown in Fig. 10(C) and Fig. 11 shows a graph where abscissa shows frequency and ordinate shows electric field strength. It compares the conventional printed circuit board where 9301V,p:\opr\d,492d1v.s 18 1 I -19the bent part B is at a right angle, the printed circuit board which is the example of embodiment shown in Fig. 10(B) where the interior angle of the bent part B is set to approx. 135°, and the printed circuit board which is the example of embodiment shown in Fig. 10(C) where R is given to the bent part B and the interior angle is set to approx. 135 As is evident from the figure, excellent magnetic wave suppression effect can be obtained if the printed circuit boards "b" and mentioned in the example of embodiment of this invention are used.

Although the graph of printed circuit board which is the example of embodiment shown in Fig. 10(D) does not show, it occupies an intermediate position between the printed circuit board and not better than and but evidently better than It is desirable to form the conductive paste layer 5 and the overcoat layer 6 also on the rear side of the substrate, although they are not shown in Fig. 10. In the .example of embodiment of the invention mentioned above the conductive paste layer 5 is connected to the ground pattern 21. It is also allowed to connect this conductive 15 paste layer 5 to the power supply pattern not shown in the figure in place of the V. ground pattern 21.

In the example of embodiment mentioned above, increase of high frequency impedance on the bent part can be prevented by setting the interior angle of the bent part wider than approx. 135 or giving circular arc to this bent part. Therefore and owing to the effect of the conductive layer, the effect of suppression of radiation noise emitted from the whole circuit board is greatly enhanced.

Fig. 12 shows still another example of a printed circuit board. At first, the circuit pattern shown in the figure is formed on the surface of substrate 1 made of insulation material such as epoxy resin, phenol resin, glass fiber or ceramics. The circuit pattern includes signal pattern 20, signal land 20a, ground pattern 21 and power supply pattern 22. These patterns can be formed by well known photolithography. After the required patterns are formed, the undercoat layer 4 is formed, leaving the partial area A of the power supply pattern 22. This undercoat layer 4 is solder resist layer made of resin insulation material. It is desirable that the area A where the power supply pattern 22 is exposed is formed with as wide area as 930127,pAoper\db,492div.spc,19 1. 1 20 possible on the substrate. At least one palace in required. This undercoat layer 4 can be easily formed by screen print. After the undercoat 4 is formed, the conductive paste layer 5 is formed thereon. The conductive paste layer 5 is made of copper paste. It covers almost the whole surface of substrate 1.

After the conductive paste layer 5 is applied it is heated to cure. Then the overcoat layer 6 made of insulation material is formed on the whole upper surface of substrate 1. This overcoat layer 6 can be made of the same material as that of the under undercoat layer 4. It can be easily formed by printing process together with the conductive paste layer 5 and the undercoat layer 4.

In the composition mentioned above, the undercoat layer 4, the conductive paste layer and the overcoat layer 6 can be all formed easily by the conventional printing process. Accordingly, the EMI-prevented circuit board can be easily made without using the complicated process. Fig. 13 shows a graph where abscissa shows frequency and ordinate shows radiation electric field strength. It compares the Sconventional printed circuit board for which EMI preventing means is not applied and the printed circuit board shown in Fig. 12. As shown in this figure, radiation of electric magnetic wave can be suppressed if the printed circuit board of Figure 12 is used. The undercoat layer 4, the conductive paste layer 5 and the overcoat layer 6 are formed successively also on the rear surface of the substrate although they are not shown in Fig. 12. From the viewpoint of suppression of electromagnetic wave radiation it is better to form the undercoat layer 4, the conductive paste layer 5 and the overcoat layer 6 on both sides of the substrate as mentioned above.

As mentioned above, if the area of ground pattern to connect the conductive layer cannot be sufficiently provided owing to restriction of layout, but sufficient area of the power supply pattern can be provided it is possible to make the printed circuit board which has the same EMI suppression effect as the conventional printed circuit board by connecting the conductive layer to the ground pattern, by connecting the above-mentioned conductive layer to this power supply pattern. Moreover, since the same production process as that applied for the conventional EMI suppressing 930127,pAopcr\dh,492div.spc,20

I*

21 printed circuit board featuring that the conductive layer is connected to the ground pattern can be applied, the production cost does not rise.

o* o 930127,p:\opcr\d,49d-vwspc,21

Claims (14)

1. A printed circuit board, comprising: a substrate; a circuit pattern formed on the substrate, the circuit pattern including a signal line pattern and a reference potential setting line pattern in which a reference potential is set for the signal line pattern; an insulation layer which is formed on the substrate so as to cover the circuit pattern excepting at least a part of the reference potential setting line pattern; a conductive layer which is formed on the insulation layer so as to be connected to an uninsulated part of the reference potential setting line pattern; and a conductive part which is formed separately from the circuit pattern and which is separated from the conductive layer by the insulation layer; wherein the conductive layer extends adjacent the conductive part so as to form a bypass capacitor between the conductive part and a part of the conductive layer opposite to the conductive part.

2. A printed circuit board according to claim 1, wherein said conductive part is a te conductive land formed on said substrate. *o

3. A printed circuit board according to claim 2, wherein said conductive land is a signal connector land in which a signal connector is connected.

4. A printed circuit board according to claim 3, wherein said reference potential setting line pattern is a ground line pattern.

5. A printed circuit board according to claim 3, wherein said reference potential setting line pattern is a power line pattern.

6. A printed circuit board according to claim 2, wherein said conductive land is a power supply terminal land to which a power supply connector is connected and said reference potential setting line pattern is a ground line pattern. 94WO1,p;opcdakLWkUaUz2xw 0 -23-

7. A printed circuit board according to claim 2, wherein said conductive land is a ground terminal land to which a ground connector is connected and said reference potential setting line pattern is a power line pattern.

8. A printed circuit board according to claim 1, wherein said conductive part is formed above said part of the conductive layer by lying an insulation layer on said conductive layer, and said conductive part is connected to a signal line pattern.

9. A printed circuit board according to claim 1, wherein said conductive part is formed above said part of the conductive layer by lying an insulation layer on said conductive layer, and said conductive part is connected to a power line pattern and said reference potential setting line pattern is ground line pattern. C 9*e*

10. A printed circuit board according to claim 1, wherein said conductive part is 15 formed above said part of the conductive layer by lying an insulation layer on said conductive layer, and said conductive part is connected to a ground line pattern and said reference potential setting line pattern is a power line pattern.

11. A printed circuit board according to claim 1, wherein an interior angle of a 20 bent part of said signal line pattern in said circuit pattern is set to appropriately 135 degrees or more.

12. A printed circuit board according to claim 1, wherein a bent part of said signal line pattern in said circuit pattern is set in a form of a circular arc.

13. A printed circuit board according to claim 1, wherein said insulation layer and said conductive layer are formed by a screen print process. 930127,p:\oper\dh,492dv.spe.23 1 24

14. A printed circuit board substantially as hereinbefore described with reference to the drawings. Dated this 29th day of January, 1993. TATSUTA ELECTRIC WIRE CABLE CO., LTD By its Patent Attorneys DAVIES COLLISON CAVE a 930129,p:\operkd,492div.spe,24