JPH0227813A - A/d converter - Google Patents

Abstract

PURPOSE:To eliminate the need for a fast speed processing for the operating component and to make the device immune to surrounding noise by providing an A/D converter exclusively at a high input level and a low input level respectively and using the converters switchingly depending on the output state. CONSTITUTION:An amplifier 1 amplifies an analog input and the A/D converters(ADC) 2, 3 whose characteristic is nearly arranged convert an analog signal into a digital signal. An adjusting device 4 obtains a ratio of signal levels of digital signals inputted from A, B and after A, B inputs are arranged, when the ADC 2 overflows, the input from the ADC 3 is outputted and in other case, the input from the ADC 2 is outputted. Thus, even when the analog signal level is smaller, since an analog signal with a large amplitude is always subject to A/D conversion, the device is immune to the surrounding noise and the A/D converter with high resolution is realized by using the A/D converter with low resolution and the operating speed is the speed for a conventional device.

Description

[Detailed description of the invention] Industrial applications The present invention particularly relates to a high resolution A/D conversion device.

2. Description of the Related Art In recent years, with the spread of digital equipment, the performance of an A/D converter, which is an interface between analog and digital signals, has come to have a significant impact. An example of a conventionally used A/D converter is shown in FIG. 6 and will be explained.

The A/D conversion device shown in FIG. 6 is called a successive approximation type and operates as follows.

(1) Set the MSB (most significant bit) of the successive approximation register 102 to '1n1' and others to '0', and output this to the D/A converter (hereinafter referred to as DAC) 1o3.

(2) The comparator 100 compares the input and the output of DAC1o3, and if (input)≧(DAC output), sets the next lower bit to “1”, and if (input)≦(DAC output), the current problem is detected. Set the bit that is set to "0" and the next lower bit to "1".

(3) Repeat steps 1 to 2 until MS B-+LS B (least significant bit).

(4) Take out data from the successive approximation register 102 and make it a digital output.

Problems to be Solved by the Invention However, in the above configuration, increasing the number of bits to increase the resolution increases the conversion time, and in order to maintain the operating frequency, the comparator 100 and the DAC1 are required.
An OS that operates at extremely high speed is required. Moreover, there is a problem in that the closer the signal is to the LSB, the more easily it is affected by surrounding noise.

In view of the above-mentioned problems, the present invention provides an A/D conversion device that is less susceptible to the influence of peripheral noise and does not require speeding up of the elements used due to an increase in bits.

Means for Solving the Problems In order to solve the above problems, the present invention provides a plurality of A/D converters for converting upward analog signals into digital signals.
a converter, a level conversion means for converting an analog input signal into a plurality of signals with different levels, and inputting the signals to the plurality of A/D converters respectively; and adjusting means for selectively adjusting and outputting the level of the input according to the amplitude level of the input signal, and the output of the adjusting means is an A/D converted output.

Function The present invention has the above-mentioned configuration, and is equipped with dedicated A/D converters for high input level and low input level, and is digitally switched and used depending on the state of the respective digital outputs. A high-resolution A/D converter is realized using a low-resolution A/D converter, which is less susceptible to the effects of surrounding noise and is not affected by the noise associated with switching because the switching is done digitally. Moreover, the operating speed of the elements used remains the same as before.

Example The present invention will be explained below based on the drawings.

FIG. 1 is a block diagram schematically showing an A/D conversion device according to an embodiment of the present invention. In the figure, 1 is an amplifier, which amplifies the analog input. Here, one with a gain of about 24 dB is used. Reference numerals 2 and 3 are A/D converters (hereinafter referred to as ADCs) having substantially the same characteristics, which convert analog signals into digital signals. Here, one with 16-bit resolution is used. Although an offset normally occurs in an A/D converter, it is assumed here that the offset level is zero or has been removed. 4 is a 20-bit output adjustment device, which calculates the ratio of the signal levels of the digital signals input from A and B, and after aligning the levels of A and B inputs, if ADC2 is overflowing, It outputs the input from ADCa, and at other times outputs the input from ADC2.

Next, the operation shown in FIG. 1 will be explained. When an analog input is given, the given analog input is input as is to ADCa, and the analog input amplified by 24 dB by amplifier 1 is given to ADC2. Here, ADC2,3
Considering the output value of , the analog input is amplified by about 24 dB by amplifier 1, and since the characteristics of ADCs 2 and 3 are almost the same, ADC 2 outputs a value that is about 16 times that of ADCa. become. However, if a high amplitude analog input is given, on the contrary, 8DC2 overflows and only ADCa operates normally. Adjustment device 4 is the ADC when ADC2 is not overflowing.
Accurately calculate the ratio of 2 and 3, and when ADC2 does not overflow, output the value of ADC2 as it is, and
When DC2 is overflowing, the output of ADCa is amplified in level according to the determined ratio and output.

Assuming that the ratio of the outputs of AL)C2 and 3 determined by the adjustment device 4 is 15.75 times, if ADC2 does not overflow, the 16 bits of the output of ADc2+7) are compressed to the lower 16 bits, and The side 4 bits are filled with sign bits and output. When ADC2 overflows, 15.7
Multiply by 5 and output the upper 20 bits of the multiplication result.

Normally, a high-performance analog amplifier 1 can be easily obtained, so by configuring it in this way, the gain of the amplifier 1 does not become a problem, and
Even if the sensitivities of the ADCs 2 and 3 are not the same, a stable A/D converter with high bits and high resolution can be obtained. Further, it is not necessarily necessary to use a high-resolution A/D converter, and the operating speed may be the same as conventional ones. Furthermore, the number of bits output from the A/D converter is determined by the gain of amplifier 1, so the number of output bits can be changed by changing the gain of amplifier 1 as necessary. I can do it. Additionally, since all output switching is done digitally, there is no noise or click noise associated with this.

FIG. 2 shows a specific embodiment of the A/D conversion device according to the present invention. In FIG. 2, parts having the same functions as those in FIG. 1 are given the same symbols and detailed explanations are omitted. To explain this diagram, 6 is a multiplier, input X,
Multiply each 16-bit data given to Y,
The upper 21st bit of the multiplication result is rounded off, and the upper 20 bits are output. 6 is an overflow detector, A
Detects overflow of DC2 output. When overflow is detected, it outputs "1". 7 is a ratio detector, and while monitoring the overflow detector 6, the ADC
The data output from ADCs 2 and 3 when ADC 2 is not overflowing is compared, the ratio is calculated, and the result is output as 16-bit data. 8 is a selector, and if the control signal given to terminal C is "1", it outputs the signal given to terminal A, and the control signal given to terminal C is '0'.
”, the signal given to terminal B is output.Terminal A has a 20-bit input, but terminal B has a 16-bit input.When outputting data given to terminal B, the sign of that data is output. A Jlo bit output is obtained by adding the bits to the upper four pits.A low pass filter (hereinafter referred to as LPF) 11 limits the band of the signal input to the ADC 2,s.

Next, the operation shown in FIG. 2 will be explained. The analog input band-limited by the LPFll is directly connected to the ADCs.
is amplified by 24 dB by amplifier 1. Therefore, the outputs of ADCs 2 and 3 have a ratio of approximately 16:1. Further, the ratio detector 7 accurately calculates and outputs this ratio. Here, as a method for calculating the ratio by the ratio detector 7, the quotient of the output value of the ADC 2 divided by the output value of the ADCs may be calculated, but for example, if the output of the ADCs is @
ADC2 at 0000010000000000″
The output at may also be stored. Since the value obtained by the ratio detector 7 is multiplied by the output value of the ADCs using the multiplier 6, the output of the multiplier 6 is L
The value is the same as when the output of the PF11 is input to the ADCs via an amplifier having exactly the same characteristics as the amplifier 1. Since the multiplier 6 output and the ADC 2 output are switched based on the overflow detector 6 output using the selector 8, when the signal amplitude of the input analog signal is small, the signal amplitude is amplified by the amplifier 1. /
Performs D conversion and outputs it, performs A/D conversion directly and outputs it when the signal amplitude of the analog signal is large, and performs A/D conversion with high resolution even when the signal amplitude of the analog input is small. I can do it.

FIG. 3 shows another embodiment of the A/D conversion device according to the present invention. In FIG. 3, parts having the same functions as those in FIGS. 1 and 2 are given the same symbols and detailed explanations are omitted. To explain this figure, 9 is a comparator, which compares the data input to terminal A and terminal B when ADC 2 is not overflowing while monitoring overflow detector 6, and depending on the magnitude relationship, ,A=,B
Then C1=1. If IAI<IB+, then 1jcl-0, C2-0, and if IAI>IB+, Cl-0, C2-1. Moreover, when the output of the overflow detector 6 is "1", C1=1°C2-0,! :Become. 1o is an up/down counter (hereinafter referred to as U/D counter), which stops counting when "1" is applied to terminal I, and starts counting up when "1'" is applied to terminal U. 0'', a countdown is performed.

Next, to explain the operation in Fig. 3, the analog input band-limited by the LPFll is directly connected to the ADC3.
2 is amplified by 24 dB by amplifier 1. Therefore, the output of ADC2,s has a ratio of approximately 16:1. The output of ADC3 is given to multiplier 6, and U
Multiplication with the output value of the /D counter 1° is performed. This multiplication result and the output of the ADC 2 are applied to a comparator 9 and compared in magnitude. In the comparator 9, if (1 multiplication result 1) squared ADC2 output 1), then IAI>IBI, so C
2-1, C11111otonashi, U/DfJt:/1i
1o counts up, and the output value of the U/D counter 1o increases. Then, the output value of the multiplier 6 also increases, and eventually A=B. And conversely, (1 multiplication result l
)>(1ADc2 output 1) Then, since AI<IBI, C2=O, CI=O, the U/D counter 10 counts down, the output value of the U/D counter 1o becomes smaller, and in the same way, Then A=B. Therefore, the output of the multiplier 6 has the same value as when the output of the LPF 11 is input to the ADC 3 via an amplifier having exactly the same characteristics as the amplifier 1. Since the output of the multiplier 6 and the output of the ADC 2 are switched based on the output of the overflow detector 6 using the selector 8, as in the case shown in FIG. A/D conversion can always be performed with high resolution.

If the U/D counter 10 is, for example, about 20 bits and the upper 16 bits are outputted to the multiplier 6, (multiplication result), , , (A
(DC2 output), stable operation can be obtained without fluctuations in the output value of the U/D counter 1o. Furthermore, although the comparator 9 is configured to compare the absolute values of the inputs, it may be configured to compare only when the input values are positive, and output the results, for example.

FIG. 4 shows another embodiment of the A/D conversion device according to the present invention. In FIG. 4, parts having the same functions as those in FIGS. 1 to 3 are given the same symbols and detailed explanations are omitted. In this embodiment, contrary to FIG. 2, a multiplier 6 is used to attenuate the output of the A/D converter which amplifies the analog input.

To explain this diagram, an analog input band-limited by LPFl 1 is applied directly to ADC 3, and is applied to ADC 2 after being reduced by 24 dB by amplifier 1. Therefore A.D.
The outputs of C2,3 have a ratio of approximately 16:1. Further, the ratio detector 7 accurately calculates and outputs this ratio. Here, as a method of calculating the ratio by the ratio detector 7, A
The quotient of the output value of DC3 divided by the output value of ADC2 may be obtained, but for example, when the output of ADC2 is 0100000000000000'', the output at 0ADCs may be stored.Ratio detector 7
Since the output value of the ADC 3 is multiplied by the value obtained in the multiplier 5, the output of the multiplier 5 is LP
The value is the same as when the F11 output is input to the ADC 3 via an amplifier having exactly the same characteristics as the amplifier 1. Since the output of the multiplier 5 and the output of the ADC 2 are switched using the selector 8 based on the output of the overflow detector 6, as in the case shown in FIG. A/D conversion can always be performed with high resolution.

FIG. 5 shows a specific embodiment of another A/D conversion device according to the present invention. Note that in FIG. 5, parts having the same functions as those in FIGS. 1 to 4 are given the same symbols, and detailed explanations are omitted. In this embodiment, contrary to FIG. 3, a multiplier 5 is used to attenuate the output of the A/D converter which amplifies the analog input.

To explain this diagram, an analog input band-limited by LPFl 1 is directly applied to ADC 3, and is applied to ADC 2 after being amplified by 24 dB by amplifier 1. Therefore, the outputs of ADCs 2 and 3 have a ratio of approximately 16:1.

The output of the ADC 2 is given to a multiplier 6, where it is multiplied by the output value of the U/D counter 1o. This multiplication result and A
The output of DC3 is given to comparator 9 and compared in magnitude. In the comparator 9, (1 multiplication result 1)<CIADC3
If output 1), then IAI>IB+, so C2-1,
CI=0, the U/D counter 1o counts up, and the output value of the υ/D counter 1o increases.

Then, the output value of the multiplier 6 also increases, and eventually A
-B. Conversely, (1 multiplication result 1)〉(lADc2
If output 1), then IAI<IB+, so C2-0,
When CI=O, the U/D counter 10 counts down, and the output value of the υ/D counter 1o becomes small.Similarly, A=B soon. Therefore, the output of multiplier 5 is L
The value is the same as when the output of PF11 is input to ADC3 via an amplifier having exactly the same characteristics as amplifier 1. Since the output of the multiplier 5 and the output of the ADC 2 are switched using the selector 8 based on the output of the overflow detector 6, as in the case shown in Fig. 3 below, regardless of the magnitude of the analog input signal amplitude, A/D conversion can be performed with high resolution.

In the above embodiment, the analog input is amplified and input to ADC2, but the signal is directly input to ADC2, and the signal attenuated using an attenuator is input to ADC3. Needless to say, you can do it this way. Also, although two A/D converters are used in the above embodiment, it is also possible to use three or more A/D converters and apply analog inputs of different levels to each A/D converter. be.

Effects of the Invention As described above, the present invention includes a plurality of A/D converters that convert an analog signal into a digital signal, a plurality of A/D converters that convert an analog input signal into a plurality of signals with different levels,
A/D converter includes level converting means for inputting the respective inputs to the A/D converter, and adjusting means for inputting the outputs of the plurality of A/D converters and selectively adjusting the level of the input according to the amplitude level of the input and outputting the adjusted level, By using the A/D conversion output as the output of the adjustment means, even if the analog signal level becomes low, it is possible to always A/D convert a large amplitude analog signal, making it less susceptible to the effects of surrounding noise. In addition, since switching is performed digitally, a high-resolution A/D converter can be realized using a low-resolution A/D converter without being affected by noise associated with switching, and the operating speed is lower than that of conventional A/D converters. It has the excellent effect that it can be used as standard.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an outline of an A/D converter according to an embodiment of the present invention, FIG. 2 is a block diagram showing a specific embodiment of an A/D converter according to the present invention, and FIGS. FIG. 6 is a block diagram showing another embodiment of an A/D converter according to the present invention, and FIG. 6 is a block diagram showing a conventional A/D converter. 1... Amplifier, 2, 3... A/D converter, 4... Processing device, 5... Multiplier,
6... Overflow detector, 7...
Ratio detector, 8...Selector, 9...
Comparator, 1o...Up/down counter, 11
・Old...Low pass filter. Name of agent: Patent attorney Shigetaka Awano and 1 other person Oka! - Senior

Claims (2)

[Claims] (1) A plurality of A/D converters that convert analog signals into digital signals, and level conversion that converts the analog input signal into a plurality of signals with different levels and inputs the signals to the plurality of A/D converters, respectively. and adjustment means that takes the outputs of the plurality of A/D converters as input and selectively adjusts the level of the input according to the amplitude level of the input and outputs the output, and the output of the adjustment means is An A/D conversion device characterized by an A/D conversion output. (2) means for determining a ratio between the reference input and other inputs by setting the lowest level input among the plurality of inputs as a reference input; and means for adjusting the level of the other inputs according to the ratio; A/C according to claim 1, further comprising a selection means for selecting and outputting one of the output of the adjusting means and the reference input according to the levels of a plurality of inputs.
D conversion device.