JPS6159913A - Ad converting circuit - Google Patents

Ad converting circuit

Info

Publication number
JPS6159913A
JPS6159913A JP18112184A JP18112184A JPS6159913A JP S6159913 A JPS6159913 A JP S6159913A JP 18112184 A JP18112184 A JP 18112184A JP 18112184 A JP18112184 A JP 18112184A JP S6159913 A JPS6159913 A JP S6159913A
Authority
JP
Japan
Prior art keywords
circuit
over range
converter
output
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18112184A
Other languages
Japanese (ja)
Inventor
Norio Iizuka
紀夫 飯塚
Hisao Hanmura
半村 久雄
Tetsuo Echizen
越前 哲郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP18112184A priority Critical patent/JPS6159913A/en
Publication of JPS6159913A publication Critical patent/JPS6159913A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To constitute inexpensively an A/D converting circuit having a function of over range detection by applying logical operation to a digital output of an A/D converter having no over range detecting function so as to obtain an over range signal thereby using the A/D converter without over range detection function. CONSTITUTION:An overflow detection circuit 7 of AND circuit constitution detecting that the level of all output bits of each output bit of an A/D converter 5 are at high level and an underflow detection circuit 8 of AND circuit constitution detecting that they are all at low level are provided. Then outputs of both the detection circuits are ORed to generate an over range output from an over range output terminal 9, allowing to constitute the inexpensive circuit only with simple logical circuits only.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はAD変換回路に関する。[Detailed description of the invention] Industrial applications The present invention relates to an AD conversion circuit.

従来の技術 従来、AD変換器の大部分はオーバーレンジ検出機能が
なくオーバーレンジ機能ヲ有スるAD変換器は特殊で高
価であった。
2. Description of the Related Art In the past, most AD converters did not have an overrange detection function, and AD converters with an overrange function were special and expensive.

発明が解決しようとする問題点 オーバーレンジ検出機能を有するAD変換器は品種が少
なく高価であるという問題を有している。
Problems to be Solved by the Invention There are problems in that AD converters having an overrange detection function are available in few varieties and are expensive.

問題を解決するための手段 本発明はオーバーレンジ検出機能のないAD変換器のデ
ジタル出力信号に論理演算をほどこしてオーバーレンジ
信号を得ることを特徴とするものである。
Means for Solving the Problem The present invention is characterized in that an overrange signal is obtained by performing a logical operation on a digital output signal of an AD converter without an overrange detection function.

作用 本発明(−よればオーバーレンジ検出機能のないAD変
換器を用いてオーバーレンジ検出機能を、有する人り変
換回路を構成する事ができる。
According to the present invention (-), it is possible to construct a human conversion circuit having an overrange detection function using an AD converter without an overrange detection function.

実施例 本発明の一実施例を説明する。第1図中1はAD変換す
るアナログ信号の入力端子、2は上位基準電圧入力端子
、3は下位基準電圧入力端子で、この2つの間の電圧の
アナログ信号デジタル変換する。4は変換クロック入力
端子で、このクロックの立上がυ又は立下が9でアナロ
グ入力端子1に入力したアナログ信号をデジタル出力端
子7より出力する。AD変換器5はアナログ信号入力端
子1に入力するアナログ信号が上位基準電圧と同じ電圧
になった時は所定のデジタル信号を出力するが、(この
例ではすべてハイレベルの信号とする。)上位基準圧よ
り高い電圧のアナログ入力信号が入力しても、上位基準
電圧と同じ電圧のアナログ入力があフた時と同じデジタ
ル信号を出力してしまう。そこでAD変換器5からのデ
ジタル出力がすべてハイレベルになるのをオーバーフロ
ー検出回路7で検出し、オーバーフロー出力とする。又
、AD変換器5は下位基準電圧と同じ電圧のアナログ信
号がアナログ入力端子1(二人力すると所定のデジタル
信号(この例ではすべてローレベルとする。)を出力す
るが、下位基準電圧より低い電圧のアナログ信号が入力
しても同じデジタル信号を出力してしまうので、AD変
換器5のデジタル信号がすべてローレベルになるのをア
ンダーフロー検出回路8で検出してアンダーフロー出力
とする。オーバーフロー検出回路7の出力とアンダー7
0−検出回路8の出力の論理和をとってオーバーレンジ
出力端子からのオーバーレンジ出力とする。
EXAMPLE An example of the present invention will be described. In FIG. 1, 1 is an input terminal of an analog signal to be AD converted, 2 is an upper reference voltage input terminal, and 3 is a lower reference voltage input terminal, and the analog signal of the voltage between these two is converted into digital. Reference numeral 4 denotes a conversion clock input terminal, and when this clock rises at υ or falls at 9, the analog signal input to the analog input terminal 1 is outputted from the digital output terminal 7. The AD converter 5 outputs a predetermined digital signal when the analog signal input to the analog signal input terminal 1 becomes the same voltage as the upper reference voltage (in this example, all signals are high level). Even if an analog input signal with a voltage higher than the reference voltage is input, the same digital signal as when the analog input with the same voltage as the upper reference voltage goes out is output. Therefore, the overflow detection circuit 7 detects that all digital outputs from the AD converter 5 become high level, and outputs an overflow. In addition, the AD converter 5 outputs a predetermined digital signal (in this example, all low level) when an analog signal with the same voltage as the lower reference voltage is input to the analog input terminal 1 (when two people input it), but it is lower than the lower reference voltage. Even if a voltage analog signal is input, the same digital signal is output, so the underflow detection circuit 8 detects when all the digital signals of the AD converter 5 become low level and outputs an underflow.Overflow Output of detection circuit 7 and under 7
The logical sum of the outputs of the 0-detection circuit 8 is taken to provide an overrange output from the overrange output terminal.

発明の効果 上述したよつに、本発明によれば、オーバーレンジ検出
機能のないAD変換器を用いてオーバーレンジ検出機能
を有するAD変換回路を比較的安価に構成することがで
きる。
Effects of the Invention As described above, according to the present invention, an AD conversion circuit having an overrange detection function can be constructed at relatively low cost using an AD converter without an overrange detection function.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図である0 1はアナログ入力端子、2は上位基準電圧入力端子、3
は下位基準電圧入力端子、4は変換クロック入力端子、
5はAD変換器、6はデジタル出力端子、7はオーバー
フロー検出回路、8はアンダーフロー検出回路、9はオ
ーツ(−レンジ出力端子
FIG. 1 is a circuit diagram showing an embodiment of the present invention. 0 1 is an analog input terminal, 2 is an upper reference voltage input terminal, 3 is a circuit diagram showing an embodiment of the present invention.
is the lower reference voltage input terminal, 4 is the conversion clock input terminal,
5 is an AD converter, 6 is a digital output terminal, 7 is an overflow detection circuit, 8 is an underflow detection circuit, 9 is an automatic (-range output terminal)

Claims (1)

【特許請求の範囲】[Claims] AD変換器のデジタル出力信号に論理演算をほどこして
オーバーレンジ信号を得ることを特徴とするAD変換回
路。
An AD conversion circuit characterized in that an overrange signal is obtained by performing a logical operation on a digital output signal of an AD converter.
JP18112184A 1984-08-30 1984-08-30 Ad converting circuit Pending JPS6159913A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18112184A JPS6159913A (en) 1984-08-30 1984-08-30 Ad converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18112184A JPS6159913A (en) 1984-08-30 1984-08-30 Ad converting circuit

Publications (1)

Publication Number Publication Date
JPS6159913A true JPS6159913A (en) 1986-03-27

Family

ID=16095218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18112184A Pending JPS6159913A (en) 1984-08-30 1984-08-30 Ad converting circuit

Country Status (1)

Country Link
JP (1) JPS6159913A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55128468A (en) * 1979-03-27 1980-10-04 Canon Inc Recording head
JPS641553A (en) * 1987-03-27 1989-01-05 Canon Inc Base body for ink jet recording head, ink jet recording head and ink jet recording apparatus equipped with said recording head
JPS6486619A (en) * 1987-09-28 1989-03-31 Nec Corp Digital signal processing circuit
JPH02254819A (en) * 1989-03-28 1990-10-15 Nec Ic Microcomput Syst Ltd Analog/digital conversion circuit
JPH03198429A (en) * 1989-12-26 1991-08-29 Mitsubishi Electric Corp Input level deciding circuit for a/d converter
US5301404A (en) * 1992-03-26 1994-04-12 Tokyo Electric Co., Ltd. Method of producing printer head using piezoelectric member
US5818482A (en) * 1994-08-22 1998-10-06 Ricoh Company, Ltd. Ink jet printing head
US6106106A (en) * 1997-01-14 2000-08-22 Nec Corporation Ink jet recording head having a piezoelectric substrate
US6161926A (en) * 1995-10-09 2000-12-19 Nec Corporation Ink jet recording device made of a dielectric polarized material
WO2001030577A1 (en) 1999-10-29 2001-05-03 Aprion Digital Ltd. Inkjet print head
US6361151B1 (en) 1998-03-20 2002-03-26 Nec Corporation Ink jet recording head and manufacturing method thereof
US6578956B1 (en) 1999-04-30 2003-06-17 Canon Kabushiki Kaisha Ink jet recording head and ink jet recording apparatus
US6601952B2 (en) 2000-04-28 2003-08-05 Canon Kabushiki Kaisha Recording apparatus
US6834940B2 (en) 2002-04-04 2004-12-28 Canon Kabushiki Kaisha Liquid discharge head and recording apparatus provided with the liquid discharge head

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55128468A (en) * 1979-03-27 1980-10-04 Canon Inc Recording head
JPH0322305B2 (en) * 1979-03-27 1991-03-26 Canon Kk
JPS641553A (en) * 1987-03-27 1989-01-05 Canon Inc Base body for ink jet recording head, ink jet recording head and ink jet recording apparatus equipped with said recording head
JPS6486619A (en) * 1987-09-28 1989-03-31 Nec Corp Digital signal processing circuit
JPH02254819A (en) * 1989-03-28 1990-10-15 Nec Ic Microcomput Syst Ltd Analog/digital conversion circuit
JPH03198429A (en) * 1989-12-26 1991-08-29 Mitsubishi Electric Corp Input level deciding circuit for a/d converter
US5301404A (en) * 1992-03-26 1994-04-12 Tokyo Electric Co., Ltd. Method of producing printer head using piezoelectric member
US5818482A (en) * 1994-08-22 1998-10-06 Ricoh Company, Ltd. Ink jet printing head
US6390609B1 (en) 1995-10-09 2002-05-21 Nec Corporation Ink jet recording device and method of producing the same
US6161926A (en) * 1995-10-09 2000-12-19 Nec Corporation Ink jet recording device made of a dielectric polarized material
US6106106A (en) * 1997-01-14 2000-08-22 Nec Corporation Ink jet recording head having a piezoelectric substrate
US6361151B1 (en) 1998-03-20 2002-03-26 Nec Corporation Ink jet recording head and manufacturing method thereof
US6658737B2 (en) 1998-03-20 2003-12-09 Fuji Xerox Co., Ltd. Ink jet recording head and manufacturing method thereof
US6578956B1 (en) 1999-04-30 2003-06-17 Canon Kabushiki Kaisha Ink jet recording head and ink jet recording apparatus
WO2001030577A1 (en) 1999-10-29 2001-05-03 Aprion Digital Ltd. Inkjet print head
US6601952B2 (en) 2000-04-28 2003-08-05 Canon Kabushiki Kaisha Recording apparatus
US6834940B2 (en) 2002-04-04 2004-12-28 Canon Kabushiki Kaisha Liquid discharge head and recording apparatus provided with the liquid discharge head

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