JPH0734540B2 - A / D converter - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high resolution A / D converter.

2. Description of the Related Art With the spread of digital equipment in recent years, the performance of A / D converters, which are interfaces between analog signals and digital signals, has an important and significant influence. FIG. 6 shows an example of an A / D conversion device which has been conventionally used, and its description will be given. The A / D conversion device shown in FIG. 6 is called a successive approximation type and operates as follows.

(1) Set the MSB (most significant bit) of the successive approximation register 102 to “1” and the other to “0”, and set this to the A / D converter (hereinafter DAC).
Output) to 103.

(2) The comparator 100 compares the input with the output of the DAC 103. If (input) ≥ {DAC output}, the lower one bit is set to "1", and if {input} ≤ {DAC output}, the current Set the bit in question to "0" and set the lower one bit to "1".

(3) Repeat steps 1 to 2 from MSB to LSB (least significant bit).

(4) Data is taken out from the successive approximation register 102 and is output digitally.

However, in the configuration as described above, when the number of bits is increased to increase the resolution, the conversion time is increased, and therefore the comparator 100 and the DAC 103 are very fast in order to maintain the operating frequency. Something that works is required. Moreover, LSB
There has been a problem that the closer it is to, the more susceptible it is to ambient noise.

In view of the above problems, the present invention provides an A / D conversion device that is not easily affected by ambient noise and that does not require the speedup of elements to be used due to the increase in bits.

Means for Solving the Problems In order to solve the above problems, the A / D converter of the present invention includes a plurality of A / D converters for converting an analog signal into a digital signal, and an analog input signal is amplified at a predetermined ratio. Alternatively, the level conversion means for attenuating and inputting to each of the plurality of A / D converters, and the plurality of A / D converter outputs are input, and the ratio of the amplitude levels of these inputs is detected. And adjusting means for selectively outputting the amplitude level of the input based on the above, and the output of the adjusting means is A / D converted output.

Action The present invention has the above-described configuration, which is provided with an A / D converter dedicated to each of the high input level and the low input level, and is digitally switched according to the state of each digital output. It is difficult to be affected by, and since it is digitally switched, the high resolution A /
The D converter can be realized by using a low resolution A / D converter, and the operating speed of the elements used is good as before. Furthermore, regarding the waveform continuity in the switching unit, the ratio of each A / D converter output is detected and adjusted, so waveform discontinuity occurs even if the parts used are not highly accurate. It does not.

EXAMPLES The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an outline of an A / D conversion device according to an embodiment of the present invention. In the figure, 1 is an amplifier, which amplifies an analog input. Here, a gain of about 24 dB is used. 2 and 3 are A / D converters with almost the same characteristics (hereinafter referred to as ADC
Is called) and converts an analog signal into a digital signal. Here, the one with 16-bit resolution is used. Although an offset is usually generated in the A / D converter, it is assumed here that the offset level is zero or removed. Reference numeral 4 is a 20-bit output adjusting device, which calculates the ratio of the signal levels of the digital signals input from A and B, and after aligning the levels of the A and B inputs,
When ADC2 overflows, it outputs the input from ADC3, and at other times, it outputs the input from ADC2.

Next, the operation of FIG. 1 will be described. When the analog input is given, the given analog input is inputted to the ADC 3 as it is, and the analog input amplified by 24 dB by the amplifier 1 is given to the ADC 2. Here, considering the output values of ADC2,3, the analog input is amplified by about 24 dB by the amplifier 1, and the characteristics of ADC2,3 are almost the same, so the value of ADC2 is about 16 times that of ADC3. It has been output. However, conversely, if a high amplitude analog input is given,
ADC2 overflows and only ADC3 operates normally.
Adjustment device 4 ADC when ADC2 is not overflowing
Accurately calculate the ratio of 2 and 3, and when ADC2 does not overflow, output the value of ADC2 as it is, and when ADC2 overflows, output the output of ADC3 by amplifying the level according to the calculated ratio and outputting. .

If the ratio of the outputs of the ADCs 2 and 3 for which the adjusting device 4 is obtained here is 1
If it is 5.75 times, when ADC2 does not overflow, the output 16 bits of ADC2 are packed in the lower 16 bits and the upper 4 bits are filled with the sign bit and output. AD
When C2 overflows, the output 16 bits of ADC3 are multiplied by 15.75, and the upper 20 bits of the multiplication result are output.

Usually, a high-performance analog amplifier 1 can be easily obtained. Therefore, by configuring in this way, the accuracy of the gain of the amplifier 1 does not become a serious problem, and the sensitivity of the ADCs 2 and 3 is improved. It is possible to stably obtain an A / D converter with a high bit and high resolution even if not all of them are available.
Moreover, it is not always necessary to use a high resolution A / D converter, and the operation speed may be the same as the conventional one. In addition, since how many bits the output of the A / D converter is made depends on how much the gain of the amplifier 1 is set, the number of output bits is changed by changing the gain of the amplifier 1 as necessary. You can Further, since the output switching and the like are all performed by digital operation, there is no influence of noise and click sound accompanying this.

FIG. 2 shows a concrete embodiment of the A / D converter according to the present invention. In FIG. 2, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted. Explaining this figure, 5 is a multiplier, and inputs X and Y
Multiply each 16-bit data given to, round the upper 21st bits of the multiplication result, and output the upper 20 bits. An overflow detector 6 detects the overflow of the ADC2 output. Outputs "1" when overflow is detected. Reference numeral 7 denotes a ratio detector which compares the data output from the ADCs 2 and 3 when the ADC 2 is not overflowing while monitoring the overflow detector 6, calculates the ratio and outputs it as 16-bit data.
Reference numeral 8 denotes a selector which outputs a signal given to the terminal A if the control signal given to the terminal C is "1", and outputs a signal given to the terminal B if the control signal given to the terminal C is "0" To do. Terminal A is a 20-bit input, but terminal B
Is a 16-bit input, and when the data given to the terminal B is output, a 20-bit output is obtained by adding the sign bit of the data to the upper 4 bits. Reference numeral 11 is a low-pass filter (hereinafter referred to as LPF) that limits the band of the signals input to ADCs 2 and 3.

Next, the operation of FIG. 2 will be described. The analog input band-limited by LPF11 is directly to ADC3 and the amplifier 1 to ADC2.
Is given by being amplified by 24 dB. Therefore, the outputs of ADCs 2 and 3 have a ratio of about 16: 1. Further, the ratio detector 7 accurately calculates and outputs this ratio. Here, as a method of calculating the ratio by the ratio detector 7, the value of the output of the ADC2 is AD
You may find the quotient by dividing by the value of the output of C3, for example ADC3
The output of the ADC2 when the output of is "0000010000000000" may be stored. Since the value obtained by the ratio detector 7 is used to multiply the output value of the ADC 3 using the multiplier 5, the output of the multiplier 5 is an LPF 11 output which is an amplifier having exactly the same characteristics as the amplifier 1. The same value as when input to ADC3 via. Since the output of the multiplier 5 and the output of the ADC 2 are switched based on the output of the overflow detector 6 by using the selector 8, the signal amplitude is amplified by the amplifier 1 when the signal amplitude of the input analog signal is small. A / D conversion is performed and this is output. When the analog signal amplitude is large, A / D conversion is directly performed and this is output. Even when the analog input signal amplitude is small, A / D conversion is performed with high resolution. You can do it.

FIG. 3 shows another embodiment of the A / D converter according to the present invention. In FIG. 3, those having the same functions as those in FIGS. 1 and 2 are designated by the same reference numerals, and detailed description thereof will be omitted. Explaining this figure, 9 is a comparator, which monitors the overflow detector 6 and compares the data input to the terminal A and the terminal B when the ADC 2 is not overflowing. If A = B, then C1
= 1 and C2 = 0, and | A | <| B | results in C1 = 0 and C2 = 0, and | A |> | B | results in C1 = 0 and C2 = 1. When the output of the overflow detector 6 is "1", C1 = 1 and C2 = 0. Reference numeral 10 is an up / down counter (hereinafter referred to as a U / D counter), which stops the counting operation when "1" is given to the terminal I, and counts up when the terminal U is given "1", When it is 0 ", the countdown is performed.

Next, the operation of FIG. 3 will be described. An analog input band-limited by the LPF 11 is given to the ADC 3 directly and to the ADC 2 after being amplified by 24 dB by the amplifier 1. Therefore ADC2,3
The output of has a ratio of about 16: 1. The output of the ADC 3 is given to the multiplier 5 and is multiplied by the output value of the U / D counter 10. The result of this multiplication and the output of the ADC 2 are given to the comparator 9, and the magnitude comparison is performed. If {| multiplication result |} <{| ADC2 output |} in comparator 9, | A |> | B |
2 = 1, C1 = 0, the U / D counter 10 counts up, and the output value of the U / D counter 10 increases. Then, the output value of the multiplier 5 also increases, and A = B in the meantime. Conversely, if {| multiplication result |}> {| ADC2 output |}, then | A | <| B |, so C2 = 0, C1 = 0, and the U / D counter 10 counts down and U / D The output value of the D counter 10 decreases, and in the same manner, A = B. Therefore, the output of the multiplier 5 has the same value as when the LPF 11 output is input to the ADC 3 via the amplifier having exactly the same characteristics as the amplifier 1. Since the output of the multiplier 5 and the output of the ADC2 are switched based on the output of the overflow detector 6 by using the selector 8, as in the case shown in FIG.
A / D conversion can always be performed with high resolution regardless of the size of the analog input signal amplitude.

If the U / D counter 10 is, for example, about 20 bits and the upper 16 bits are output to the multiplier 5, when {multiplication result} "0" {ADC2 output} Stable operation can be obtained without changing the output value of the U / D counter 10. Further, although the comparator 9 is configured to compare the absolute values of the inputs, it is also possible to perform the comparison only when the input value is positive and output the result.

FIG. 4 shows another embodiment of the A / D converter according to the present invention. In FIG. 4, those having the same functions as those in FIGS. 1 to 3 are designated by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, contrary to FIG. 2, the output of the A / D converter which is given by amplifying the analog input is attenuated by the multiplier 5.

To explain this figure, the analog input whose band is limited by LPF11 is directly input to ADC3 and the amplifier 1 is input to ADC2.
24dB is given and given. Therefore, the outputs of ADC2,3 have a ratio of about 16: 1. Further, the comparison detector 7 accurately calculates and outputs this ratio. Here, as a method of calculating the ratio by the ratio detector 7, it may be calculated as a quotient obtained by dividing the output value of ADC3 by the output value of ADC2.
The output of the ADC3 at the time of "000000000000" may be stored. The value obtained by the comparison detector 7 is stored in the multiplier 5
Since the output value of ADC3 is multiplied by using
The output of the multiplier 5 has the same value as when the LPF 11 output is input to the ADC 3 via an amplifier having exactly the same characteristics as the amplifier 1. Since the output of the multiplier 5 and the output of the ADC2 are switched based on the output of the overflow detector 6 by using the selector 8, like the case shown in FIG.
Always with high resolution regardless of the amplitude of the analog input signal
A / D conversion can be performed.

FIG. 5 shows a concrete embodiment of another A / D conversion device according to the present invention. In FIG. 5, those having the same functions as those in FIGS. 1 to 4 are designated by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, contrary to FIG. 3, the output of the A / D converter which is given by amplifying the analog input is attenuated by using the multiplier 5.

To explain this diagram, the analog input whose band is limited by LPF11 is directly input to ADC3, and ADC2 is connected to ADC2 by amplifier 1.
It is given after dB amplification. Therefore, the outputs of ADC2,3 have a ratio of about 16: 1. The output of ADC2 is given to the multiplier 5,
The output value of the U / D counter 10 is multiplied. The result of this multiplication and the output of the ADC 3 are given to the comparator 9, and the magnitude comparison is performed. In the comparator 9, {| multiplication result |} <{| ADC3
If output |}, then | A |> | B |. C2 = 1, C1 = 0, U / D counter 10 counts up, and U / D counter 10
The output value of becomes large. Then, the output value of the multiplier 5 also increases, and A = B in the meantime. Conversely, if {| multiplication result |}> {| ADC2 output |}, then | A | <| B |, so C2 = 0, C1 = 0, and the U / D counter 10 counts down and U / D The output value of the D counter 10 becomes smaller, and A = B in the same manner. Therefore, the output of the multiplier 5 is LP
It has the same value as when the F11 output is input to the ADC3 through an amplifier having exactly the same characteristics as the amplifier 1. This multiplier 5
Since the output and the ADC2 output are switched based on the overflow detector 6 output by using the selector 8, as in the case shown in Fig. 3 below, the A resolution is always high with the resolution regardless of the size of the analog input signal amplitude. / D conversion can be performed.

In the above embodiments, the analog input is amplified and input to ADC2, but it is directly input to ADC2 and the signal attenuated using the attenuator is input to ADC3. It goes without saying that you can do so. Also, although two A / D converters are used in the above embodiment, three or more A / D converters may be used, and analog inputs of different levels may be added to each. is there.

Effects of the Invention As described above, the present invention provides a plurality of A / D converters for converting an analog signal into a digital signal, and a plurality of A / D converters for amplifying or attenuating an analog input signal at a predetermined ratio.
A level converting means respectively input to the D converter and the plurality of A / D converter outputs are input, the ratio of the amplitude levels of these inputs is detected, and the amplitude level of the input is adjusted based on the detection result. Equipped with adjusting means for selectively outputting afterwards,
Since the output of the adjusting means is the A / D conversion output, even if the analog signal level becomes small, it is possible to A / D convert the analog signal of large amplitude at all times, so it is less likely to be affected by ambient noise, In addition, since digital switching is performed, a high-resolution A / D converter can be realized by using a low-resolution A / D converter without being affected by noise caused by the switching, and the operating speed is the same as before. It has the excellent effect that high precision circuit elements are not required.

[Brief description of drawings]

1 is a block diagram showing an outline of an A / D converter according to an embodiment of the present invention, FIG. 2 is a block diagram showing a concrete embodiment of an A / D converter according to the present invention, and FIGS. FIG. 5 is a block diagram showing another embodiment of another A / D converter according to the present invention, and FIG. 6 is a block diagram showing an A / D converter conventionally used. 1 ... Amplifier, 2,3 ... A / D converter, 4 ... Processing device, 5
…… Multiplier, 6 …… Overflow detector, 7 …… Ratio detector, 8 …… Selector, 9 …… Comparator, 10 …… Up / down counter, 11 …… Low pass filter.

Claims (3)

[Claims] 1. A plurality of A / D converters for converting an analog signal into a digital signal, and a level for amplifying or attenuating an analog input signal at a predetermined ratio and inputting to each of the plurality of A / D converters. A conversion means and an adjustment means for receiving the outputs of the plurality of A / D converters, detecting a ratio of the amplitude levels of these inputs, and adjusting the amplitude level of the input based on the detection result and then selectively outputting the adjusted amplitude level. And an A / D conversion device, wherein the output of the adjusting means is an A / D conversion output. 2. An adjusting means for obtaining a ratio of another A / D converter output to a first A / D converter output in the plurality of A / D converters, and a plurality of the plurality of A / D converter outputs based on the ratio. It has an adjusting means for adjusting an input level, and a selecting means for selecting and outputting any one of the adjusting means output and the first A / D converter output based on the plurality of input levels. The A / D conversion device according to claim 1. 3. An adjusting means uses an input of a minimum level among a plurality of inputs of the adjusting means as a reference input, a register, an adjusting means for adjusting the level of the input according to the contents of the register, and the adjusting means. Comparing means for comparing the level of the output of the means with the output of the first A / D converter in the plurality of A / D converters; changing means for changing the contents of the register based on the output of the comparing means; 2. The A / D according to claim 1, further comprising: a selecting unit that selects and outputs one of the adjusting unit output and the first A / D converter output according to a plurality of input levels. Converter.