JPS60141023A - Analog digital converting storage device - Google Patents

Abstract

PURPOSE:To increase the conversion accuracy by amplifying or attenuating after an analog input signal is A/D-converted, applying A/D conversion to the output further, storing once both the said conversion output and correcting the result of the normalized amplification attenuating rate. CONSTITUTION:An output of the A/D converter 11 is inputted to an amplification attenuator 13. Then the input signal delayed by a delay time with conversion at a delay circuit 12 is inputted to the amplification attenuator 13 at the same time and its output is inputted to an A/D converter 14. Then the output of both the converters is stored in a memory 15. The output of the converter 11 is inputted to a digital comparator 16 at the same time, and the comparator 16 compares it with the content of a register 17 and outputs a larger value to the register 17 as a maximum value. When the input system processing is finished, a controller 20 gives a command of normalization of the output (amplification attenuation rate) of the converter 11 to a correction circuit 18. The normalization is conducted by using the maximum value of the amplification attenuation rate of the register 17. The amplification attenuation rate subject to normalization is stored again in the memory 15 ane each input signal and each normalized amplification attenuation rate are multiplied by the correction circuit 18 so as to correct the input signal.

Description

[Detailed description of the invention] (Technical field〕 The present invention relates to an analog-taskicle conversion storage device.

(When extracting features of an audio signal in conventional radio signal processing, if the processing cannot be performed in real time, the audio signal must be converted from analog to digital on some device (1).
Hereinafter, this will be referred to as A/IJ conversion. ] A method has been adopted in which the digitized signal is stored, and after the storage is completed, the stored values are processed.

Conventionally, when inputting an analog value and converting a signal into a digitized value and storing it, the input signal sound may be input as it is, or after being uniformly amplified or attenuated, the A/D converter converts the signal into A/JJf.
, and recorded the digital value on a storage device.

FIG. 1 is a block diagram showing an example of such a conventional A/IJ conversion device. The structure of this conventional example is that the A/IJ converter 1. Memory 2. Address pointer 3, control circuit 4
Consisting of

Next, the operation of this conventional example will be explained. In the input signal list, a control signal instructing the controller 4 to start is inputted from the outside. The controller 4 provides a timing signal for A/JJ conversion to the A/l) converter l, and the A/l) converter l accordingly converts the analog input signal? A/l) conversion is performed using a dampu hold. Controller 4 sends a write signal to memory 2 .

The digital value that is the output of the A/D converter 1 is stored at a memory address 1 in the memory 2 indicated by address number 3. When the above operations are completed, the controller 4 changes the address indicated by the address pointer 3 and supplies it to the next sampling timing signal fA/D converter l.

Conventional A/D conversion devices have the following problems because the level of the input signal cannot be predicted.

+11 A/L) A signal with a level exceeding the maximum input level was input to converter 1.

In this case, the output power of the A/D converter does not become a digital value corresponding to the input signal level and is distorted.

(2) On the other hand, if a signal with a small level is input, the conversion range of the A/IJ converter will not be used effectively, which will cause deterioration of accuracy and noise during A/L conversion. However, the conventional A/IJ conversion storage device does not have a solution to this problem.

Therefore, when an analog signal is A/l) converted and recorded, there is a drawback that the signal deteriorates considerably.

(Object of the Invention) An object of the present invention is to provide an analog-to-digital conversion storage device that eliminates the above-mentioned drawbacks and enables accurate digital conversion regardless of the magnitude of the analog input signal.

(Structure of the Invention) The analog-to-digital conversion storage device of the present invention includes a first analog-to-digital conversion means for converting an analog input signal into a digital signal, and an analog-to-digital conversion device for converting an analog input signal into a digital signal by a delay time caused by the first analog-to-digital conversion means. a delay means for totally delaying the input signal; and a delay means for delaying the entire input signal;
an amplifying/attenuating means for amplifying or attenuating the output of the delay means according to an output of the digital converting means; a second analog-to-digital converting means for converting the output of the amplifying/attenuating means from analog to digital; storage means for storing the outputs of the two analog-to-digital conversion means, respectively; and the second analog-to-digital conversion means stored in the storage means in accordance with the outputs of the first analog-to-digital conversion means stored in the storage means. - correction means for correcting the output of the digitizing conversion means.

(Example) Below, five examples of the present invention will be described with reference to the drawings.

FIG. 2 is a diagram showing a first embodiment of the present invention.

In this embodiment, p as a first analog-to-digital conversion means for converting an analog input signal into a digital signal,
A/D converter 11, a delay circuit 12 as a delay means for delaying the analog input signal by the delay time generated by the A/l) converter 11, an amplification/attenuation device 13 as an amplification/attenuation means for amplifying or attenuating an output;
A/JJ converter 14 as a second analog-to-digital conversion means for converting the output from analog to digital;
All the outputs of the A/D converters 11 and 14 are stored in a memory 15 as a storage means and a memo IJ15.
A digitizer comparator 16 as a correction means stored in the memory 15 according to the output of the fc A/D converter 11 and correcting the output of the 7'c A/11 converter 14. register 1
7. This is a controller for setting the timing including the correction circuit 18 and the metal.

The operation of this embodiment will be explained below. When a control signal instructing the controller 20 to start inputting a signal is input from the outside, the controller 20 gives sample-hold timing to the Al1) converter 11.

The output of the A/IJ converter 11 is input to the attenuator 13. At the same time, the input signal delayed by the delay time generated by the A/l) converter 11 is input to the amplification attenuator 13 by the delay circuit W512. Amplification attenuator 13 is A/D converter 1
Amplification and attenuation are performed by multiplying the input signal by the reciprocal of the output value of 1. The output of the amplification/attenuation device 13 is input to the A1) converter 14.

The controller 20 provides sample and hold timing to the A/I converter 14.

Controller 20 then provides a write signal to memory 15. /JJ* The output of converters 11 and 14 is address pointer 1.
It is stored onto Memo+115 at the address indicated by 9. The outputs of the A/D converter 11 are input to the digital comparator 16 on the same day. Digital comparator 1
6 is A/l) The input value from the converter it and the contents of the register gate 17 are compared and the larger value is set as the maximum value and is set in register 1.
Output to 7.

The controller 20 changes the address pointed to by the address layer pointer 19 and ends the lv' combining process. In this way, processing is performed on input signals one after another.

When a control signal instructing the controller 20 to end signal input is input from the outside, the high-power system processing ends.

The controller 20 instructs the correction circuit 18 to normalize the output of the A7/D converter 11 (hereinafter referred to as the amplification attenuation factor).The normalization is compared by the digital comparator 16 and sent to the register 17. This is done by dividing each gain attenuation factor by the maximum value of the stored gain attenuation factors. Each normalized gain attenuation factor is again stored in Memo I31.
5 is stored above. Next, each input signal being amplified or attenuated and each normalized amplification attenuation factor are corrected by a circuit 18.
The input signal is modified by multiplying by C.

As explained above, according to this embodiment, the analog input signal is A/I) converted by the A/IJ converter 11,
Amplify and attenuate the analog input signal according to the result.
3 performs amplification or attenuation, and the amplification/attenuation device 13
The output sound A/I) is A/IJ converted by the converter 14, and the A/I
After temporarily recording the output of the J converter fi, 14 on the memo IJ 15, and inputting all the signal tones, input the amplified or attenuated input signal.

% by correcting by the normalized amplification attenuation factor
The following effects can be obtained.

(The A/IJ converter can be used efficiently during A/D conversion of the input signal (%A/1)) The generation of noise due to the quantization error of the converter can be suppressed. ■Even small signals that exceed the maximum input level of the A/D converter can be obtained by adding P-level metal processing to the amplification attenuator, increasing the dynamic range of the input signal and making it easier to re-input the signal. There is no need for this.

FIG. 3 is a block diagram showing a second embodiment of the invention.

In the first embodiment shown in FIG. 2, when the output value of the A/D converter 11 is written to the memory 15, the maximum value is increased by the digital comparator 16 to correct the contents of the storage device. In this embodiment, after all the input signals have been processed, the maximum value of the output value of the digital/D converter 11 stored in the memory 15' is calculated by the digital comparator 16'.

A correction circuit 18 corrects the cutting edge value of the A/l) converter 14 stored in the memory 15' by the register 17'.
'.

It is clear that in this embodiment, the same effect as in the first embodiment can be obtained using C.

Furthermore, it is clear that the same effect can be obtained by using a comparator that compares the input signal with a predetermined value in place of the A/D converter 11 in the above embodiment.

Furthermore, in this example, a semiconductor memory is assumed as a device, but other devices, such as a floppy disk, a magnetic tape, etc., can be used regardless of whether they are random access devices or sequential devices. It is clear that configuration is possible.

(Effect of invention As described above in detail, according to the present invention.

In the Al1) conversion of the input signal, C can be used to effectively utilize all of the Viratra of the Al1) converter, so accuracy is improved and noise caused by quantization errors is suppressed. Also A/l
) Since the signal is attenuated even for signals that exceed the maximum allowable input level of the converter, there is no need to re-input the signal, and it operates with high accuracy even for signal sources that can only be input once. An analog-to-digital conversion storage device is obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional analog/digital storage device, FIG. 2 is a block diagram showing a first embodiment of the present invention, and FIG. 3 is a block diagram showing a second embodiment of the present invention. I am myself. l...A/l) converter, 2...--memory, 3...address pointer %4...
Controller, 11...A/D converter, 12...
-・Delay circuit% 13...Amplification attenuator, 14・
...A/l) converter, 15.15'...
Memo! j, 16.16'...Digital comparator, 17°17'...Register, 18.18'.
Old...Revised W&, 19...Address Boy/
ri, 20, old...controller. Half a time and a spider

Claims (1)

[Claims] +1) A first analog-to-digital conversion means for converting an analog input signal into a digital signal, and a delay means for delaying the analog input signal by a delay time generated by the first analog-to-digital conversion means. and an amplification/attenuation means for amplifying or attenuating the output of the delay means in accordance with the output of the first analog-to-digital conversion means. a second analog-to-digital conversion means for converting the output of the amplification and attenuation means from all analog to digital; a storage means for storing the outputs of the first and second analog-to-digital conversion means; and the first means. and modifying means for modifying the output of the second analog-to-digital converting means stored in the first means according to the output of the first analog-to-digital converting means described in The analog-to-digital converter is a device. (2) An analog-to-digital conversion apparatus according to claim 11, wherein the first analog-to-digital conversion means comprises comparison means for comparing the analog input signal with a predetermined value.