JPS58146114A - Level controlling circuit - Google Patents

Abstract

PURPOSE:To prevent the reduction in the dynamic range, by controlling both circuit multiplying input digital signals and D/A conversion circuit generating output signals with a volume control signal. CONSTITUTION:In a digital signal processing circuit 7 increasing/decreasing the input signals as digital signals, the input digital signal 1 and a value set with the 1st control signal (2-1) from a volume control processing circuit 9 are multiplied and the digital output value is converted into analog signals at a D/A converter 6, and the amplitude of an analog output signal 3 is controlled with the 2nd control signal (2-2). Since the control is performed in two stages, the control of -8dB is performed entirely with the control of -2dB; -6dB for example, and the overflow of the multiplier of the digital signal processing circuit is avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a level control circuit suitable for use as a volume control circuit or the like in a 1-diode amplifier.

The amplitude control of the output signal in an audio amplifier (channel control) has a wide control range (Wk
Ranges from dB to several tens of dB. In general, in digital audio amplifiers that take digital signals as input and analog signals as output, in order to obtain the desired analog signal without impairing the noise resistance of the digital signal, the termination is It is considered advantageous to convert the digital signal into an analog signal at the step.

In this way, the so-called PWM converts the digital signal into a -HPWM (Pulse Radiation Modulation) signal, turns the power on/off using the PWM signal, and converts the on/off output into an analog signal by passing it through a low-pass filter. A digital-to-analog conversion circuit (hereinafter also referred to as a D/A conversion circuit) based on this method is used to input an analog signal to a speaker, which is the final stage of an audio signal. However, in this case, the so-called volume control, which controls the level of the input signal to the speaker, has a major drawback. This will be explained below with reference to the drawings.

FIGS. 1 and 2 are block diagrams showing conventional volume control systems, respectively.

In these figures, 1 is a digital signal, 2 Hzl (
IJ Neem control amount, 3 is analog signal output, 4
is the multiplication output, 5 is the analog signal, 6 is the D/A conversion circuit,
7 is a digital signal processing circuit, and 8 is an analog signal processing circuit.0 The volume control method shown in FIG. 1 is a method in which volume control is performed by digital signal processing. That is, in the digital signal ROM digital signal processing circuit 7, multiplication processing is performed according to the volume control amount 2, and the multiplication output 4 obtained as a result is inputted to the D/A conversion circuit 6, and the analog signal is output from the output side. Obtain signal output 3.

In this case, as mentioned above, since the range of the volume control is very wide, depending on the value of the multiplier used in the multiplication process, the oat flow or the number of bits may be reduced, resulting in a reduction in the dynamic range. , In order to avoid this, it is necessary to increase the number of bits required for the D/A conversion circuit 6, but this increases the cost and is difficult to implement.
This shows a method for controlling volume using analog signal processing. That is, digital signal 1 is
First, it is converted into an analog signal 5 by the D/A conversion circuit 6. This signal 5 is amplified or attenuated in an analog signal processing circuit 8 according to the volume control amount 2 to obtain 1 output 3.

In this case, when the analog signal is amplified in the processing circuit 8, the noise on the signal will also be amplified at the same time. That's S
/N ratio is not a good idea.

In the control system shown in Fig. 2, in addition to this, D/
A method can be considered in which the level of the analog signal obtained from the output side is controlled by controlling the power supply voltage of the A conversion circuit 6 according to the volume control amount, but since the required range of volume control is large, the dynamic range is limited. There have been drawbacks such as deterioration of linearity of D/A conversion and deterioration of linearity of D/A conversion.

The present invention has been made to eliminate the drawbacks in the prior art as described above, and therefore, the purpose of the present invention is to:
Provides a level control circuit that can cover a wide volume control range without deteriorating A/D conversion linearity or dynamic range, or deteriorating the S/N ratio. The key points of the present invention are to include a digital signal processing circuit that increases or decreases an input digital signal in digital form and outputs the same; A level control circuit is constituted by a D/A conversion circuit that can increase or decrease the volume, and a part of the required volume control range is controlled by the increase or decrease in the digital signal processing circuit, and the remaining part is controlled by the D/A conversion circuit. The point is that this is covered by increasing and decreasing the analog signal output level.

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 113 is a block diagram showing an embodiment of the present invention.

In the same figure, the same reference numerals as in FIGS. 1 and 2 indicate the same thing. 0 In addition, 9 Gj Volume control F low "AWINBMS (2-1) is the first control signal, (2- 2) indicates the second control signal.

In FIG. 3, the input digital signal 1 is the first control signal (2-1) from the volume control processing circuit 9.
) is input as a multiplicand to the set digital signal processing circuit 7, where it undergoes multiplication processing. The resulting multiplication output 4 is input to a digital-to-analog conversion circuit 6. This conversion circuit 6 receives a second control signal (2-
2) makes it possible to control the amplitude of the analog output signal 3.

Here, the first and second control signals (2-1) and (2
-2) is generated in the volume control processing circuit 9 based on the volume control amount 2). For example, if the volume control amount 2 is -gdB
In the case of
By performing a control amount of -6 dB in the conversion circuit 6, a total volume control of -8 dB can be realized.

FIG. 4 is a block diagram showing the embodiment shown in FIG. 3 in more detail.

In the figure, the digital signal processing circuit 7 consists of a multiplication circuit (7-1), and the volume control processing circuit 9 consists of a division circuit (9-1) and a D/A conversion circuit (9-1).
-2). Note that 10 is a volume adjustment knob consisting of a variable resistor, etc., and 11 is an A/D converter.

Since the volume control amount set by the volume adjustment knob 10 is an analog amount, it is converted into a digital amount by the A/D conversion circuit 11 before being input to the volume control processing circuit 9. If the volume control amount is given as a digital amount from the beginning, A/
The D conversion circuit 11 is not necessary. The digital volume control amount 2 is calculated by the division circuit (9-1) as the dividend.
), the 0 division circuit (9-1) divides the dividend as the control amount 2 by the divisor given separately for 1, uses the quotient as the first control signal (2-1), and then outputs the 0 division circuit (9-1) to the multiplication circuit. Send to (7-1).

The multiplication circuit ( 7 - 1 ) multiplies the input digital signal 1 with the quotient using the multiplicand, and sends the multiplication output 4 to the D/A conversion circuit 6 .

On the other hand, from the division circuit (9-1), the divisor used for division is sent to the D/A conversion circuit (9-2), where it is converted into an analog quantity and then sent to the second control signal (2 -2) is supplied to the D/A conversion circuit 6. Note that the division circuit (9-
From 1), the first control signal (2-1) uses the divisor instead of the quotient.
The quotient is sent to the multiplication circuit (7-1) as a second control signal (2-2) via the D/A conversion circuit (9-2).
Of course, the signal may also be supplied to the /A conversion circuit 6.

As explained above, by using the digital multiplication circuit (7-1) as the digital signal processing circuit 7, it is possible to output an arbitrary value as the multiplication output 4. but,
If the multiplier (in this case, the quotient from the division circuit (9-1)) is greater than or equal to 1, the multiplication output value may overflow.

On the other hand, if it is less than 1, the dynamic range of the multiplication output value decreases. For example, in the case of 1/2, S1 bit or 5d
The dynamic range decreases by B. However, if the number of bits of the multiplication output 4 is increased, the above-mentioned overflow or decrease in the dynamic range will be eliminated, but the required pitch 51 of the digital-to-analog conversion circuit 6 in the next stage will need to be increased. Furthermore, when only the insole of 2 is used as a multiplier, the multiplication can be performed by bit shifting the multiplicand, and the multiplication circuit (7-1) as the digital signal processing circuit 7 can be simplified. Next, a description of the digital-to-analog conversion circuit 6 will be added. When using a ladder network type digital-to-analog conversion circuit as the digital-to-analog conversion circuit 6, the value of the reference voltage source or reference constant current source in the conversion circuit is variably set by the 1 control signal (2-2). By this, the amplitude of the analog output signal 3 can be controlled.
As the A conversion circuit 6, a PWM-PA as described below is used.
It is also possible to use an M combination type D/A conversion circuit.

Now, in the field of digital fist audio equipment, etc.
As a D/A converter used when reproducing an analog signal for dowiping a speaker from a digital signal,
It is expensive because it requires something with excellent linearity. Therefore, an analog signal is obtained by converting the digital signal into a -HPWM (pulse width modulation) signal, turning the power on/off using the PWM signal, and passing the on/off output through a bass filter. A relatively inexpensive PWM type D/A converter was considered. However, the PWM
When trying to obtain the required resolution with the D/A converter of the method,
Since the clock frequency used becomes very high and impractical, in order to solve this problem, the number of bits of the input bits is changed to PAM (Pulse Amplitude Modulation).
This is a combined PWM/PAM method that converts it into a signal and outputs it, and converts the remaining plllli into a PWM (pulse width variable 1Il) signal, outputs it, and adds the two to make an analog signal. A D/A converter has been proposed (Japanese Patent Application No. 56-201681).

The 5th WJ is a circuit diagram showing the configuration of such a combination type D/A converter. This converter is shown as one that performs conversion by dividing an 8-bit input digital signal into two LSB4 bits and M8B4 bits. be.

In FIG. 5, 4 is a digital signal input, counter 31
and the decoder 19 sets the sampling period (i/rs) to 5
The counter 32 and decoder 20 have the function of converting 2° to 2 pits of the input digital signal 4 into a PWM signal. 13 is a coincidence circuit that detects coincidence between the output signal of each decoder and the input digital signal 4; 14 is a coincidence circuit that detects coincidence between the output signal of each decoder and the input digital signal 4;
Switch circuit for selecting 18, 15 to 18 are each v
ls, vls # Vl? It is a power supply with a voltage of e Via.

FIG. 6 is a time chart of various signals in the 51j circuit.

Hereinafter, the circuit operation of the fifth WJ will be explained with reference to the sixth WJ.

In this method, the 68th! As shown in OA, the sampling period (1/fs=Ts) corresponding to the sampling period is divided into 5 equal parts (111 to gB) L, and the inside of al is further x/1.
6 (atl) p 1/8 (als) e 1/4 (a
xs) Divide into a1/2 (al4) small sections. The voltage selected by these small intervals is the interval ml #1
12 is V, aS is 2VSa4 is 4Vsa5 is 8V, and the area represented by the product of each of these interval widths and the voltage magnitude is the one with the smallest area, that is, all. 1 (that is, LSB), the maximum area (aS part) is 128, and if all ms are accounted for, it is 255 (that is, MSB).

By selecting each of these sections as necessary according to the input digital signal, it is possible to convert them into 28 analog values (corresponding to the area).

For example, if each bit of 2.2.2 of input signal 4 is 1'', all, al4, and aS in section a1 may be selected as shown in FIG. 6B.

This will be specifically explained next. counters 31 and 32
is reset by a reset signal (see reset signal in Figure 6) generated when input data 4 changes,
The clock signals are counted over the sampling period and the count results are sent to decoders 20 and 19.

As a result, the timing signals X1 to X4 output from the output terminals X1 to X4 of the decoder 20 each have a pulse width equal to the section width of all*"12pJ113yl14, as shown in FIG.
The timing signals output from the output terminals a1 to a5 have a pulse width obtained by dividing the sampling period into five equal parts, as shown in FIG.

In the matching circuit 13, the timing signal from each decoder and the input data 4 are compared, and the switch of the switch circuit 14 is opened and closed every time the timing signals from each decoder and the input data 4 become @1'' at the same time. °, each bit of 23°2 is @1
” Therefore, at the timing of ~111 and a14, the voltage Vl!I is changed to the voltage Vial at the timing of a5.
is selected. The power supplies from VtS to VtS have voltages of 2V, 4V, and 8V, respectively, with V15 being V. Furthermore, two or more switches in the switch circuit 14 are never closed at the same time. Therefore, an output as shown in FIG. 6B is obtained. This output is guided to the low-pass filter 33 and the analog signal 3
get.

In such a D/A converter, if the reference voltage (2) at the voltages H'bs to Vll is varied by the control signal (2-2), the amplitude of the analog signal J# output 3 can be varied.

As described above, according to the present invention, a level control circuit with less reduction in dynamic range due to digital signal processing and less reduction in linearity and 8/N ratio due to analog signal processing can be achieved at relatively low cost. It has the advantage of being able to provide

[Brief explanation of the drawing]

#I1 and FIG. 112 are block diagrams showing the conventional gelume control system, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. 4 is a block diagram showing the embodiment shown in FIG. 3. A more specific block diagram, Figure 5, shows the PWM
- A circuit diagram showing the configuration of a PAM combined method D/A converter,
FIG. 17g6 is a time chart of various signals in the circuit of FIG. 5. Code explanation 1... Input digital signal, 2. Song, g l
j Neem control amount, 3... Analog output signal, 4... Multiplication output, 5... Analog signal, 6... D/A conversion circuit, 7・・・・・・
・Digital signal processing circuit, (7-1)... Multiplication circuit, 8... Analog processing circuit, 9...
...Volume control processing T11 circuit, (9-1)
...Division circuit, (9-2) ...D/A
Conversion circuit, 10...Volume adjustment knob, 11...
...A/D conversion circuit, 13...matching circuit,
14...Switch circuit, 15-18...
・Voltage source, 19 e 20... Decoder, 31
．． 32...Counter, 33...Low pass filter agent Patent attorney Namiki Sarao

Claims (1)

[Claims] 1) A volume control that inputs a digital signal and outputs an analog signal in response thereto, and separately gives the level of analog output compensation for the manually inputted digital signal; a level control circuit that can control the input digital signal according to a predetermined multiplier and outputs the multiplier; In addition to outputting
A digital analog conversion circuit (hereinafter referred to as a D/A conversion circuit) that can increase or decrease the level of a digital signal output according to instructions, and a multiplication circuit in the digital signal processing circuit based on a given volume control signal. A first control signal for instructing the switching and a second control signal for instructing an increase/decrease in the analog signal output level in the D/A converter circuit are generated, and the digital signal processor 11 circuit and the D/A converter 11 circuit are connected to each other. A level control circuit comprising: a volume control processing circuit for sending signals to a volume control circuit; 2. In the level control circuit according to claim 1, the D/A conversion circuit converts the number of bits of the digital signal input into a PWM (pulse variation 1g) signal. A PWM modulation circuit converts the remaining number of bits into a PAM (Pulse Amplitude Modulation) signal and outputs it, and the PWM signal and PAM signal from both modulation circuits are added together. and means for converting into an analog signal.